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@@ -495,25 +495,25 @@ static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev)
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val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER)
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& ~WM8350_DCDC_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
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- wm8350->pmic.dcdc1_hib_mode);
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+ val | wm8350->pmic.dcdc1_hib_mode);
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break;
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case WM8350_DCDC_3:
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val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER)
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& ~WM8350_DCDC_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
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- wm8350->pmic.dcdc3_hib_mode);
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+ val | wm8350->pmic.dcdc3_hib_mode);
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break;
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case WM8350_DCDC_4:
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val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER)
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& ~WM8350_DCDC_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
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- wm8350->pmic.dcdc4_hib_mode);
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+ val | wm8350->pmic.dcdc4_hib_mode);
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break;
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case WM8350_DCDC_6:
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val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER)
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& ~WM8350_DCDC_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
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- wm8350->pmic.dcdc6_hib_mode);
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+ val | wm8350->pmic.dcdc6_hib_mode);
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break;
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case WM8350_DCDC_2:
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case WM8350_DCDC_5:
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