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@@ -142,23 +142,25 @@ int r600_page_table_init(struct drm_device *dev)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
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+ struct drm_local_map *map = &gart_info->mapping;
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struct drm_sg_mem *entry = dev->sg;
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int ret = 0;
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int i, j;
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- int max_pages, pages;
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- u64 *pci_gart, page_base;
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+ int pages;
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+ u64 page_base;
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dma_addr_t entry_addr;
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+ int max_ati_pages, max_real_pages, gart_idx;
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/* okay page table is available - lets rock */
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+ max_ati_pages = (gart_info->table_size / sizeof(u64));
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+ max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
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- /* PTEs are 64-bits */
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- pci_gart = (u64 *)gart_info->addr;
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-
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- max_pages = (gart_info->table_size / sizeof(u64));
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- pages = (entry->pages <= max_pages) ? entry->pages : max_pages;
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+ pages = (entry->pages <= max_real_pages) ?
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+ entry->pages : max_real_pages;
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- memset(pci_gart, 0, max_pages * sizeof(u64));
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+ memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u64));
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+ gart_idx = 0;
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for (i = 0; i < pages; i++) {
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entry->busaddr[i] = pci_map_single(dev->pdev,
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page_address(entry->
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@@ -176,12 +178,13 @@ int r600_page_table_init(struct drm_device *dev)
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page_base |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED;
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page_base |= R600_PTE_READABLE | R600_PTE_WRITEABLE;
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- *pci_gart = page_base;
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+ DRM_WRITE64(map, gart_idx * sizeof(u64), page_base);
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+
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+ gart_idx++;
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if ((i % 128) == 0)
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DRM_DEBUG("page entry %d: 0x%016llx\n",
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i, (unsigned long long)page_base);
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- pci_gart++;
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entry_addr += ATI_PCIGART_PAGE_SIZE;
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}
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}
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