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@@ -120,11 +120,16 @@
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#define O2_MODE_E_LED_OUT 0x08
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#define O2_MODE_E_SKTA_ACTV 0x10
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+#define O2_RESERVED1 0x94
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+#define O2_RESERVED2 0xD4
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+#define O2_RES_READ_PREFETCH 0x02
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+#define O2_RES_WRITE_BURST 0x08
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+
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static int o2micro_override(struct yenta_socket *socket)
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{
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/*
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- * 'reserved' register at 0x94/D4. chaning it to 0xCA (8 bit) enables
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- * read prefetching which for example makes the RME Hammerfall DSP
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+ * 'reserved' register at 0x94/D4. allows setting read prefetch and write
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+ * bursting. read prefetching for example makes the RME Hammerfall DSP
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* working. for some bridges it is at 0x94, for others at 0xD4. it's
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* ok to write to both registers on all O2 bridges.
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* from Eric Still, 02Micro.
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@@ -132,20 +137,35 @@ static int o2micro_override(struct yenta_socket *socket)
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u8 a, b;
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if (PCI_FUNC(socket->dev->devfn) == 0) {
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- a = config_readb(socket, 0x94);
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- b = config_readb(socket, 0xD4);
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+ a = config_readb(socket, O2_RESERVED1);
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+ b = config_readb(socket, O2_RESERVED2);
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printk(KERN_INFO "Yenta O2: res at 0x94/0xD4: %02x/%02x\n", a, b);
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switch (socket->dev->device) {
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+ /*
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+ * older bridges have problems with both read prefetch and write
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+ * bursting depending on the combination of the chipset, bridge
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+ * and the cardbus card. so disable them to be on the safe side.
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+ */
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+ case PCI_DEVICE_ID_O2_6729:
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+ case PCI_DEVICE_ID_O2_6730:
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+ case PCI_DEVICE_ID_O2_6812:
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case PCI_DEVICE_ID_O2_6832:
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- printk(KERN_INFO "Yenta O2: old bridge, not enabling read prefetch / write burst\n");
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+ case PCI_DEVICE_ID_O2_6836:
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+ printk(KERN_INFO "Yenta O2: old bridge, disabling read prefetch/write burst\n");
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+ config_writeb(socket, O2_RESERVED1,
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+ a & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));
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+ config_writeb(socket, O2_RESERVED2,
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+ b & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));
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break;
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default:
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printk(KERN_INFO "Yenta O2: enabling read prefetch/write burst\n");
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- config_writeb(socket, 0x94, a | 0x0a);
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- config_writeb(socket, 0xD4, b | 0x0a);
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+ config_writeb(socket, O2_RESERVED1,
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+ a | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST);
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+ config_writeb(socket, O2_RESERVED2,
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+ b | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST);
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}
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}
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