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@@ -923,7 +923,6 @@ intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
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/* For ILK+ */
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static void assert_shared_dpll(struct drm_i915_private *dev_priv,
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struct intel_shared_dpll *pll,
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- struct intel_crtc *crtc,
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bool state)
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{
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u32 val;
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@@ -943,28 +942,9 @@ static void assert_shared_dpll(struct drm_i915_private *dev_priv,
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WARN(cur_state != state,
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"%s assertion failure (expected %s, current %s), val=%08x\n",
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pll->name, state_string(state), state_string(cur_state), val);
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-
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- /* Make sure the selected PLL is correctly attached to the transcoder */
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- if (crtc && HAS_PCH_CPT(dev_priv->dev)) {
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- u32 pch_dpll;
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-
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- pch_dpll = I915_READ(PCH_DPLL_SEL);
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- cur_state = pll->id == DPLL_ID_PCH_PLL_B;
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- if (!WARN(((pch_dpll >> (4 * crtc->pipe)) & 1) != cur_state,
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- "PLL[%d] not attached to this transcoder %c: %08x\n",
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- cur_state, pipe_name(crtc->pipe), pch_dpll)) {
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- cur_state = !!(val >> (4*crtc->pipe + 3));
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- WARN(cur_state != state,
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- "PLL[%d] not %s on this transcoder %c: %08x\n",
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- pll->id == DPLL_ID_PCH_PLL_B,
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- state_string(state),
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- pipe_name(crtc->pipe),
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- val);
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- }
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- }
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}
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-#define assert_shared_dpll_enabled(d, p, c) assert_shared_dpll(d, p, c, true)
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-#define assert_shared_dpll_disabled(d, p, c) assert_shared_dpll(d, p, c, false)
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+#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
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+#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
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static void assert_fdi_tx(struct drm_i915_private *dev_priv,
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enum pipe pipe, bool state)
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@@ -1434,7 +1414,7 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
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if (pll->active++) {
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WARN_ON(!pll->on);
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- assert_shared_dpll_enabled(dev_priv, pll, NULL);
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+ assert_shared_dpll_enabled(dev_priv, pll);
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return;
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}
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WARN_ON(pll->on);
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@@ -1462,11 +1442,11 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
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crtc->base.base.id);
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if (WARN_ON(pll->active == 0)) {
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- assert_shared_dpll_disabled(dev_priv, pll, NULL);
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+ assert_shared_dpll_disabled(dev_priv, pll);
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return;
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}
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- assert_shared_dpll_enabled(dev_priv, pll, NULL);
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+ assert_shared_dpll_enabled(dev_priv, pll);
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WARN_ON(!pll->on);
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if (--pll->active)
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return;
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@@ -1489,8 +1469,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
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/* Make sure PCH DPLL is enabled */
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assert_shared_dpll_enabled(dev_priv,
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- intel_crtc_to_shared_dpll(intel_crtc),
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- intel_crtc);
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+ intel_crtc_to_shared_dpll(intel_crtc));
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/* FDI must be feeding us bits for PCH ports */
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assert_fdi_tx_enabled(dev_priv, pipe);
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@@ -3112,7 +3091,7 @@ found:
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if (pll->active == 0) {
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DRM_DEBUG_DRIVER("setting up %s\n", pll->name);
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WARN_ON(pll->on);
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- assert_shared_dpll_disabled(dev_priv, pll, NULL);
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+ assert_shared_dpll_disabled(dev_priv, pll);
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/* Wait for the clocks to stabilize before rewriting the regs */
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I915_WRITE(PCH_DPLL(pll->id), dpll & ~DPLL_VCO_ENABLE);
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