|
@@ -319,6 +319,30 @@
|
|
|
};
|
|
|
};
|
|
|
|
|
|
+ i2c0 {
|
|
|
+ pinctrl_i2c0: i2c0-0 {
|
|
|
+ atmel,pins =
|
|
|
+ <0 30 0x1 0x0 /* PA30 periph A I2C0 data */
|
|
|
+ 0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ i2c1 {
|
|
|
+ pinctrl_i2c1: i2c1-0 {
|
|
|
+ atmel,pins =
|
|
|
+ <2 0 0x3 0x0 /* PC0 periph C I2C1 data */
|
|
|
+ 2 1 0x3 0x0>; /* PC1 periph C I2C1 clock */
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ i2c2 {
|
|
|
+ pinctrl_i2c2: i2c2-0 {
|
|
|
+ atmel,pins =
|
|
|
+ <1 4 0x2 0x0 /* PB4 periph B I2C2 data */
|
|
|
+ 1 5 0x2 0x0>; /* PB5 periph B I2C2 clock */
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
pioA: gpio@fffff400 {
|
|
|
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
|
|
reg = <0xfffff400 0x200>;
|
|
@@ -447,6 +471,8 @@
|
|
|
interrupts = <9 4 6>;
|
|
|
#address-cells = <1>;
|
|
|
#size-cells = <0>;
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&pinctrl_i2c0>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -456,6 +482,8 @@
|
|
|
interrupts = <10 4 6>;
|
|
|
#address-cells = <1>;
|
|
|
#size-cells = <0>;
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -465,6 +493,8 @@
|
|
|
interrupts = <11 4 6>;
|
|
|
#address-cells = <1>;
|
|
|
#size-cells = <0>;
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|