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@@ -30,7 +30,8 @@ struct pch_regs {
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u32 pm;
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u32 im0;
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u32 im1;
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- u32 reserved[4];
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+ u32 reserved[3];
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+ u32 gpio_use_sel;
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u32 reset;
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};
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@@ -51,10 +52,17 @@ static int gpio_pins[] = {
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* struct pch_gpio_reg_data - The register store data.
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* @po_reg: To store contents of PO register.
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* @pm_reg: To store contents of PM register.
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+ * @im0_reg: To store contents of IM0 register.
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+ * @im1_reg: To store contents of IM1 register.
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+ * @gpio_use_sel_reg : To store contents of GPIO_USE_SEL register.
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+ * (Only ML7223 Bus-n)
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*/
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struct pch_gpio_reg_data {
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u32 po_reg;
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u32 pm_reg;
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+ u32 im0_reg;
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+ u32 im1_reg;
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+ u32 gpio_use_sel_reg;
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};
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/**
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@@ -149,6 +157,12 @@ static void pch_gpio_save_reg_conf(struct pch_gpio *chip)
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{
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chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po);
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chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm);
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+ chip->pch_gpio_reg.im0_reg = ioread32(&chip->reg->im0);
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+ if (chip->ioh == INTEL_EG20T_PCH)
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+ chip->pch_gpio_reg.im1_reg = ioread32(&chip->reg->im1);
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+ if (chip->ioh == OKISEMI_ML7223n_IOH)
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+ chip->pch_gpio_reg.gpio_use_sel_reg =\
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+ ioread32(&chip->reg->gpio_use_sel);
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}
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/*
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@@ -160,6 +174,12 @@ static void pch_gpio_restore_reg_conf(struct pch_gpio *chip)
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iowrite32(chip->pch_gpio_reg.po_reg, &chip->reg->po);
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/* to store contents of PM register */
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iowrite32(chip->pch_gpio_reg.pm_reg, &chip->reg->pm);
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+ iowrite32(chip->pch_gpio_reg.im0_reg, &chip->reg->im0);
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+ if (chip->ioh == INTEL_EG20T_PCH)
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+ iowrite32(chip->pch_gpio_reg.im1_reg, &chip->reg->im1);
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+ if (chip->ioh == OKISEMI_ML7223n_IOH)
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+ iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg,
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+ &chip->reg->gpio_use_sel);
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}
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static void pch_gpio_setup(struct pch_gpio *chip)
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