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@@ -3685,11 +3685,11 @@ struct ieee80211_ops iwlagn_hw_ops = {
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.offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
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};
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-static void iwl_hw_detect(struct iwl_priv *priv)
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+static u32 iwl_hw_detect(struct iwl_priv *priv)
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{
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- priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
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priv->rev_id = priv->pci_dev->revision;
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IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
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+ return _iwl_read32(priv, CSR_HW_REV);
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}
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static int iwl_set_hw_params(struct iwl_priv *priv)
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@@ -3740,6 +3740,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
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unsigned long flags;
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u16 pci_cmd, num_mac;
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+ u32 hw_rev;
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/************************
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* 1. Allocating HW data
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@@ -3885,9 +3886,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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*/
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iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
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- iwl_hw_detect(priv);
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+ hw_rev = iwl_hw_detect(priv);
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IWL_INFO(priv, "Detected %s, REV=0x%X\n",
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- priv->cfg->name, priv->hw_rev);
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+ priv->cfg->name, hw_rev);
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/* We disable the RETRY_TIMEOUT register (0x41) to keep
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* PCI Tx retries from interfering with C3 CPU state */
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@@ -3903,7 +3904,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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* 4. Read EEPROM
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*****************/
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/* Read the EEPROM */
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- err = iwl_eeprom_init(priv);
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+ err = iwl_eeprom_init(priv, hw_rev);
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if (err) {
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IWL_ERR(priv, "Unable to init EEPROM\n");
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goto out_iounmap;
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