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@@ -855,9 +855,9 @@ _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
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if (sizeof(dma_addr_t) > 4) {
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const uint64_t required_mask =
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dma_get_required_mask(&pdev->dev);
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- if ((required_mask > DMA_32BIT_MASK) && !pci_set_dma_mask(pdev,
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- DMA_64BIT_MASK) && !pci_set_consistent_dma_mask(pdev,
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- DMA_64BIT_MASK)) {
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+ if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
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+ DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
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+ DMA_BIT_MASK(64))) {
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ioc->base_add_sg_single = &_base_add_sg_single_64;
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ioc->sge_size = sizeof(Mpi2SGESimple64_t);
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desc = "64";
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@@ -865,8 +865,8 @@ _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
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}
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}
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- if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)
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- && !pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
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+ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
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+ && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
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ioc->base_add_sg_single = &_base_add_sg_single_32;
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ioc->sge_size = sizeof(Mpi2SGESimple32_t);
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desc = "32";
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