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@@ -322,9 +322,11 @@ struct gprefix {
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} \
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} while (0)
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-#define __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, _suffix, _ex) \
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+#define __emulate_1op_rax_rdx(ctxt, _op, _suffix, _ex) \
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do { \
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unsigned long _tmp; \
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+ ulong *rax = &(ctxt)->regs[VCPU_REGS_RAX]; \
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+ ulong *rdx = &(ctxt)->regs[VCPU_REGS_RDX]; \
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\
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__asm__ __volatile__ ( \
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_PRE_EFLAGS("0", "5", "1") \
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@@ -337,31 +339,27 @@ struct gprefix {
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"jmp 2b \n\t" \
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".popsection \n\t" \
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_ASM_EXTABLE(1b, 3b) \
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- : "=m" (_eflags), "=&r" (_tmp), \
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- "+a" (_rax), "+d" (_rdx), "+qm"(_ex) \
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- : "i" (EFLAGS_MASK), "m" ((_src).val), \
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- "a" (_rax), "d" (_rdx)); \
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+ : "=m" ((ctxt)->eflags), "=&r" (_tmp), \
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+ "+a" (*rax), "+d" (*rdx), "+qm"(_ex) \
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+ : "i" (EFLAGS_MASK), "m" ((ctxt)->src.val), \
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+ "a" (*rax), "d" (*rdx)); \
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} while (0)
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/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */
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-#define emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, _ex) \
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+#define emulate_1op_rax_rdx(ctxt, _op, _ex) \
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do { \
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- switch((_src).bytes) { \
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+ switch((ctxt)->src.bytes) { \
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case 1: \
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- __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \
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- _eflags, "b", _ex); \
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+ __emulate_1op_rax_rdx(ctxt, _op, "b", _ex); \
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break; \
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case 2: \
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- __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \
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- _eflags, "w", _ex); \
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+ __emulate_1op_rax_rdx(ctxt, _op, "w", _ex); \
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break; \
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case 4: \
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- __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \
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- _eflags, "l", _ex); \
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+ __emulate_1op_rax_rdx(ctxt, _op, "l", _ex); \
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break; \
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case 8: ON64( \
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- __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \
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- _eflags, "q", _ex)); \
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+ __emulate_1op_rax_rdx(ctxt, _op, "q", _ex)); \
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break; \
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} \
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} while (0)
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@@ -1667,8 +1665,6 @@ static int em_grp2(struct x86_emulate_ctxt *ctxt)
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static int em_grp3(struct x86_emulate_ctxt *ctxt)
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{
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- unsigned long *rax = &ctxt->regs[VCPU_REGS_RAX];
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- unsigned long *rdx = &ctxt->regs[VCPU_REGS_RDX];
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u8 de = 0;
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switch (ctxt->modrm_reg) {
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@@ -1682,20 +1678,16 @@ static int em_grp3(struct x86_emulate_ctxt *ctxt)
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emulate_1op(ctxt, "neg");
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break;
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case 4: /* mul */
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- emulate_1op_rax_rdx("mul", ctxt->src, *rax, *rdx,
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- ctxt->eflags, de);
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+ emulate_1op_rax_rdx(ctxt, "mul", de);
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break;
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case 5: /* imul */
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- emulate_1op_rax_rdx("imul", ctxt->src, *rax, *rdx,
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- ctxt->eflags, de);
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+ emulate_1op_rax_rdx(ctxt, "imul", de);
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break;
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case 6: /* div */
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- emulate_1op_rax_rdx("div", ctxt->src, *rax, *rdx,
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- ctxt->eflags, de);
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+ emulate_1op_rax_rdx(ctxt, "div", de);
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break;
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case 7: /* idiv */
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- emulate_1op_rax_rdx("idiv", ctxt->src, *rax, *rdx,
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- ctxt->eflags, de);
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+ emulate_1op_rax_rdx(ctxt, "idiv", de);
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break;
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default:
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return X86EMUL_UNHANDLEABLE;
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