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@@ -1,8 +1,171 @@
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-#ifndef ___ASM_SPARC_MOSTEK_H
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-#define ___ASM_SPARC_MOSTEK_H
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-#if defined(__sparc__) && defined(__arch64__)
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-#include <asm/mostek_64.h>
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+/*
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+ * mostek.h: Describes the various Mostek time of day clock registers.
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+ *
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+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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+ * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
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+ * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca)
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+ */
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+
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+#ifndef _SPARC_MOSTEK_H
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+#define _SPARC_MOSTEK_H
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+
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+#include <asm/idprom.h>
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+#include <asm/io.h>
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+
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+/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ)
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+ *
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+ * Data
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+ * Address Function
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+ * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0
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+ * 7ff - - - - - - - - Year 00-99
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+ * 7fe 0 0 0 - - - - - Month 01-12
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+ * 7fd 0 0 - - - - - - Date 01-31
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+ * 7fc 0 FT 0 0 0 - - - Day 01-07
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+ * 7fb KS 0 - - - - - - Hours 00-23
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+ * 7fa 0 - - - - - - - Minutes 00-59
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+ * 7f9 ST - - - - - - - Seconds 00-59
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+ * 7f8 W R S - - - - - Control
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+ *
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+ * * ST is STOP BIT
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+ * * W is WRITE BIT
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+ * * R is READ BIT
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+ * * S is SIGN BIT
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+ * * FT is FREQ TEST BIT
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+ * * KS is KICK START BIT
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+ */
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+
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+/* The Mostek 48t02 real time clock and NVRAM chip. The registers
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+ * other than the control register are in binary coded decimal. Some
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+ * control bits also live outside the control register.
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+ */
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+#define mostek_read(_addr) readb(_addr)
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+#define mostek_write(_addr,_val) writeb(_val, _addr)
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+#define MOSTEK_EEPROM 0x0000UL
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+#define MOSTEK_IDPROM 0x07d8UL
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+#define MOSTEK_CREG 0x07f8UL
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+#define MOSTEK_SEC 0x07f9UL
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+#define MOSTEK_MIN 0x07faUL
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+#define MOSTEK_HOUR 0x07fbUL
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+#define MOSTEK_DOW 0x07fcUL
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+#define MOSTEK_DOM 0x07fdUL
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+#define MOSTEK_MONTH 0x07feUL
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+#define MOSTEK_YEAR 0x07ffUL
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+
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+struct mostek48t02 {
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+ volatile char eeprom[2008]; /* This is the eeprom, don't touch! */
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+ struct idprom idprom; /* The idprom lives here. */
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+ volatile unsigned char creg; /* Control register */
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+ volatile unsigned char sec; /* Seconds (0-59) */
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+ volatile unsigned char min; /* Minutes (0-59) */
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+ volatile unsigned char hour; /* Hour (0-23) */
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+ volatile unsigned char dow; /* Day of the week (1-7) */
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+ volatile unsigned char dom; /* Day of the month (1-31) */
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+ volatile unsigned char month; /* Month of year (1-12) */
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+ volatile unsigned char year; /* Year (0-99) */
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+};
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+
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+extern spinlock_t mostek_lock;
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+extern void __iomem *mstk48t02_regs;
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+
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+/* Control register values. */
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+#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */
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+#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */
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+#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */
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+
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+/* Control bits that live in the other registers. */
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+#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */
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+#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */
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+#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */
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+
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+#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */
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+#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO)
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+
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+/* Masks that define how much space each value takes up. */
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+#define MSTK_SEC_MASK 0x7f
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+#define MSTK_MIN_MASK 0x7f
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+#define MSTK_HOUR_MASK 0x3f
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+#define MSTK_DOW_MASK 0x07
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+#define MSTK_DOM_MASK 0x3f
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+#define MSTK_MONTH_MASK 0x1f
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+#define MSTK_YEAR_MASK 0xffU
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+
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+/* Binary coded decimal conversion macros. */
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+#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04))
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+#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A))
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+
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+/* Generic register set and get macros for internal use. */
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+#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK))
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+#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0)
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+
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+/* Macros to make register access easier on our fingers. These give you
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+ * the decimal value of the register requested if applicable. You pass
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+ * the a pointer to a 'struct mostek48t02'.
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+ */
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+#define MSTK_REG_CREG(regs) (((struct mostek48t02 *)regs)->creg)
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+#define MSTK_REG_SEC(regs) MSTK_GET(regs,sec,SEC)
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+#define MSTK_REG_MIN(regs) MSTK_GET(regs,min,MIN)
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+#define MSTK_REG_HOUR(regs) MSTK_GET(regs,hour,HOUR)
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+#define MSTK_REG_DOW(regs) MSTK_GET(regs,dow,DOW)
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+#define MSTK_REG_DOM(regs) MSTK_GET(regs,dom,DOM)
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+#define MSTK_REG_MONTH(regs) MSTK_GET(regs,month,MONTH)
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+#define MSTK_REG_YEAR(regs) MSTK_GET(regs,year,YEAR)
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+
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+#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,sec,value,SEC)
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+#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,min,value,MIN)
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+#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,hour,value,HOUR)
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+#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,dow,value,DOW)
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+#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,dom,value,DOM)
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+#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,month,value,MONTH)
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+#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,year,value,YEAR)
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+
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+
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+/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the
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+ * same (basically) layout of the 48t02 chip except for the extra
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+ * NVRAM on board (8 KB against the 48t02's 2 KB).
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+ */
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+struct mostek48t08 {
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+ char offset[6*1024]; /* Magic things may be here, who knows? */
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+ struct mostek48t02 regs; /* Here is what we are interested in. */
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+};
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+
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+#ifdef CONFIG_SUN4
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+enum sparc_clock_type { MSTK48T02, MSTK48T08, \
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+INTERSIL, MSTK_INVALID };
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#else
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-#include <asm/mostek_32.h>
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+enum sparc_clock_type { MSTK48T02, MSTK48T08, \
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+MSTK_INVALID };
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#endif
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+
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+#ifdef CONFIG_SUN4
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+/* intersil on a sun 4/260 code data from harris doc */
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+struct intersil_dt {
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+ volatile unsigned char int_csec;
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+ volatile unsigned char int_hour;
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+ volatile unsigned char int_min;
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+ volatile unsigned char int_sec;
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+ volatile unsigned char int_month;
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+ volatile unsigned char int_day;
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+ volatile unsigned char int_year;
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+ volatile unsigned char int_dow;
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+};
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+
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+struct intersil {
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+ struct intersil_dt clk;
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+ struct intersil_dt cmp;
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+ volatile unsigned char int_intr_reg;
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+ volatile unsigned char int_cmd_reg;
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+};
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+
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+#define INTERSIL_STOP 0x0
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+#define INTERSIL_START 0x8
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+#define INTERSIL_INTR_DISABLE 0x0
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+#define INTERSIL_INTR_ENABLE 0x10
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+#define INTERSIL_32K 0x0
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+#define INTERSIL_NORMAL 0x0
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+#define INTERSIL_24H 0x4
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+#define INTERSIL_INT_100HZ 0x2
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+
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+/* end of intersil info */
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#endif
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+
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+#endif /* !(_SPARC_MOSTEK_H) */
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David S. Miller