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@@ -0,0 +1,594 @@
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+/*
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+ * Adaptec AAC series RAID controller driver
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+ * (c) Copyright 2001 Red Hat Inc.
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+ *
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+ * based on the old aacraid driver that is..
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+ * Adaptec aacraid device driver for Linux.
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+ *
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+ * Copyright (c) 2000-2010 Adaptec, Inc.
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+ * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2, or (at your option)
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+ * any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; see the file COPYING. If not, write to
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+ * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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+ *
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+ * Module Name:
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+ * src.c
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+ *
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+ * Abstract: Hardware Device Interface for PMC SRC based controllers
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/types.h>
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+#include <linux/pci.h>
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+#include <linux/spinlock.h>
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+#include <linux/slab.h>
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+#include <linux/blkdev.h>
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+#include <linux/delay.h>
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+#include <linux/version.h>
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+#include <linux/completion.h>
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+#include <linux/time.h>
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+#include <linux/interrupt.h>
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+#include <scsi/scsi_host.h>
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+
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+#include "aacraid.h"
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+
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+static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
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+{
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+ struct aac_dev *dev = dev_id;
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+ unsigned long bellbits, bellbits_shifted;
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+ int our_interrupt = 0;
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+ int isFastResponse;
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+ u32 index, handle;
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+
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+ bellbits = src_readl(dev, MUnit.ODR_R);
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+ if (bellbits & PmDoorBellResponseSent) {
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+ bellbits = PmDoorBellResponseSent;
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+ /* handle async. status */
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+ our_interrupt = 1;
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+ index = dev->host_rrq_idx;
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+ if (dev->host_rrq[index] == 0) {
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+ u32 old_index = index;
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+ /* adjust index */
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+ do {
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+ index++;
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+ if (index == dev->scsi_host_ptr->can_queue +
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+ AAC_NUM_MGT_FIB)
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+ index = 0;
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+ if (dev->host_rrq[index] != 0)
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+ break;
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+ } while (index != old_index);
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+ dev->host_rrq_idx = index;
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+ }
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+ for (;;) {
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+ isFastResponse = 0;
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+ /* remove toggle bit (31) */
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+ handle = (dev->host_rrq[index] & 0x7fffffff);
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+ /* check fast response bit (30) */
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+ if (handle & 0x40000000)
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+ isFastResponse = 1;
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+ handle &= 0x0000ffff;
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+ if (handle == 0)
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+ break;
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+
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+ aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
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+
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+ dev->host_rrq[index++] = 0;
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+ if (index == dev->scsi_host_ptr->can_queue +
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+ AAC_NUM_MGT_FIB)
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+ index = 0;
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+ dev->host_rrq_idx = index;
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+ }
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+ } else {
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+ bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
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+ if (bellbits_shifted & DoorBellAifPending) {
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+ our_interrupt = 1;
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+ /* handle AIF */
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+ aac_intr_normal(dev, 0, 2, 0, NULL);
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+ }
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+ }
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+
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+ if (our_interrupt) {
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+ src_writel(dev, MUnit.ODR_C, bellbits);
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+ return IRQ_HANDLED;
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+ }
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+ return IRQ_NONE;
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+}
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+
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+/**
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+ * aac_src_disable_interrupt - Disable interrupts
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+ * @dev: Adapter
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+ */
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+
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+static void aac_src_disable_interrupt(struct aac_dev *dev)
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+{
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+ src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
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+}
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+
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+/**
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+ * aac_src_enable_interrupt_message - Enable interrupts
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+ * @dev: Adapter
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+ */
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+
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+static void aac_src_enable_interrupt_message(struct aac_dev *dev)
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+{
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+ src_writel(dev, MUnit.OIMR, dev->OIMR = 0xfffffff8);
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+}
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+
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+/**
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+ * src_sync_cmd - send a command and wait
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+ * @dev: Adapter
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+ * @command: Command to execute
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+ * @p1: first parameter
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+ * @ret: adapter status
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+ *
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+ * This routine will send a synchronous command to the adapter and wait
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+ * for its completion.
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+ */
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+
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+static int src_sync_cmd(struct aac_dev *dev, u32 command,
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+ u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
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+ u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
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+{
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+ unsigned long start;
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+ int ok;
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+
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+ /*
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+ * Write the command into Mailbox 0
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+ */
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+ writel(command, &dev->IndexRegs->Mailbox[0]);
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+ /*
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+ * Write the parameters into Mailboxes 1 - 6
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+ */
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+ writel(p1, &dev->IndexRegs->Mailbox[1]);
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+ writel(p2, &dev->IndexRegs->Mailbox[2]);
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+ writel(p3, &dev->IndexRegs->Mailbox[3]);
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+ writel(p4, &dev->IndexRegs->Mailbox[4]);
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+
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+ /*
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+ * Clear the synch command doorbell to start on a clean slate.
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+ */
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+ src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
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+
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+ /*
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+ * Disable doorbell interrupts
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+ */
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+ src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
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+
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+ /*
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+ * Force the completion of the mask register write before issuing
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+ * the interrupt.
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+ */
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+ src_readl(dev, MUnit.OIMR);
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+
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+ /*
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+ * Signal that there is a new synch command
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+ */
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+ src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
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+
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+ ok = 0;
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+ start = jiffies;
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+
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+ /*
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+ * Wait up to 30 seconds
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+ */
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+ while (time_before(jiffies, start+30*HZ)) {
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+ /* Delay 5 microseconds to let Mon960 get info. */
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+ udelay(5);
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+
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+ /* Mon960 will set doorbell0 bit
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+ * when it has completed the command
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+ */
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+ if ((src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT) & OUTBOUNDDOORBELL_0) {
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+ /* Clear the doorbell */
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+ src_writel(dev,
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+ MUnit.ODR_C,
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+ OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
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+ ok = 1;
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+ break;
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+ }
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+
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+ /* Yield the processor in case we are slow */
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+ msleep(1);
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+ }
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+ if (unlikely(ok != 1)) {
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+ /* Restore interrupt mask even though we timed out */
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+ aac_adapter_enable_int(dev);
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+ return -ETIMEDOUT;
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+ }
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+
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+ /* Pull the synch status from Mailbox 0 */
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+ if (status)
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+ *status = readl(&dev->IndexRegs->Mailbox[0]);
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+ if (r1)
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+ *r1 = readl(&dev->IndexRegs->Mailbox[1]);
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+ if (r2)
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+ *r2 = readl(&dev->IndexRegs->Mailbox[2]);
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+ if (r3)
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+ *r3 = readl(&dev->IndexRegs->Mailbox[3]);
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+ if (r4)
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+ *r4 = readl(&dev->IndexRegs->Mailbox[4]);
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+
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+ /* Clear the synch command doorbell */
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+ src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
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+
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+ /* Restore interrupt mask */
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+ aac_adapter_enable_int(dev);
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+ return 0;
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+
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+}
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+
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+/**
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+ * aac_src_interrupt_adapter - interrupt adapter
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+ * @dev: Adapter
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+ *
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+ * Send an interrupt to the i960 and breakpoint it.
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+ */
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+
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+static void aac_src_interrupt_adapter(struct aac_dev *dev)
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+{
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+ src_sync_cmd(dev, BREAKPOINT_REQUEST,
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+ 0, 0, 0, 0, 0, 0,
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+ NULL, NULL, NULL, NULL, NULL);
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+}
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+
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+/**
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+ * aac_src_notify_adapter - send an event to the adapter
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+ * @dev: Adapter
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+ * @event: Event to send
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+ *
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+ * Notify the i960 that something it probably cares about has
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+ * happened.
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+ */
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+
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+static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
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+{
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+ switch (event) {
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+
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+ case AdapNormCmdQue:
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+ src_writel(dev, MUnit.ODR_C,
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+ INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
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+ break;
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+ case HostNormRespNotFull:
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+ src_writel(dev, MUnit.ODR_C,
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+ INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
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+ break;
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+ case AdapNormRespQue:
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+ src_writel(dev, MUnit.ODR_C,
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+ INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
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+ break;
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+ case HostNormCmdNotFull:
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+ src_writel(dev, MUnit.ODR_C,
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+ INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
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+ break;
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+ case FastIo:
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+ src_writel(dev, MUnit.ODR_C,
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+ INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
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+ break;
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+ case AdapPrintfDone:
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+ src_writel(dev, MUnit.ODR_C,
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+ INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
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+ break;
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+ default:
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+ BUG();
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+ break;
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+ }
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+}
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+
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+/**
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+ * aac_src_start_adapter - activate adapter
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+ * @dev: Adapter
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+ *
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+ * Start up processing on an i960 based AAC adapter
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+ */
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+
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+static void aac_src_start_adapter(struct aac_dev *dev)
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+{
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+ struct aac_init *init;
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+
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+ init = dev->init;
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+ init->HostElapsedSeconds = cpu_to_le32(get_seconds());
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+
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+ /* We can only use a 32 bit address here */
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+ src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
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+ 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
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+}
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+
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+/**
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+ * aac_src_check_health
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+ * @dev: device to check if healthy
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+ *
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+ * Will attempt to determine if the specified adapter is alive and
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+ * capable of handling requests, returning 0 if alive.
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+ */
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+static int aac_src_check_health(struct aac_dev *dev)
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+{
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+ u32 status = src_readl(dev, MUnit.OMR);
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+
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+ /*
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+ * Check to see if the board failed any self tests.
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+ */
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+ if (unlikely(status & SELF_TEST_FAILED))
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+ return -1;
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+
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+ /*
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+ * Check to see if the board panic'd.
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+ */
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+ if (unlikely(status & KERNEL_PANIC))
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+ return (status >> 16) & 0xFF;
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+ /*
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+ * Wait for the adapter to be up and running.
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+ */
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+ if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
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+ return -3;
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+ /*
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+ * Everything is OK
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+ */
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+ return 0;
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+}
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+
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+/**
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+ * aac_src_deliver_message
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+ * @fib: fib to issue
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+ *
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+ * Will send a fib, returning 0 if successful.
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+ */
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+static int aac_src_deliver_message(struct fib *fib)
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+{
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+ struct aac_dev *dev = fib->dev;
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+ struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
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+ unsigned long qflags;
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+ u32 fibsize;
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+ u64 address;
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+ struct aac_fib_xporthdr *pFibX;
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+
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+ spin_lock_irqsave(q->lock, qflags);
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+ q->numpending++;
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+ spin_unlock_irqrestore(q->lock, qflags);
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+
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+ /* Calculate the amount to the fibsize bits */
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+ fibsize = (sizeof(struct aac_fib_xporthdr) +
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+ fib->hw_fib_va->header.Size + 127) / 128 - 1;
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+ if (fibsize > (ALIGN32 - 1))
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+ fibsize = ALIGN32 - 1;
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+
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+ /* Fill XPORT header */
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+ pFibX = (struct aac_fib_xporthdr *)
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+ ((unsigned char *)fib->hw_fib_va -
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+ sizeof(struct aac_fib_xporthdr));
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+ pFibX->Handle = fib->hw_fib_va->header.SenderData + 1;
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+ pFibX->HostAddress = fib->hw_fib_pa;
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+ pFibX->Size = fib->hw_fib_va->header.Size;
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+ address = fib->hw_fib_pa - (u64)sizeof(struct aac_fib_xporthdr);
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+
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+ src_writel(dev, MUnit.IQ_H, (u32)(address >> 32));
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+ src_writel(dev, MUnit.IQ_L, (u32)(address & 0xffffffff) + fibsize);
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+ return 0;
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+}
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+
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+/**
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+ * aac_src_ioremap
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+ * @size: mapping resize request
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+ *
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+ */
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+static int aac_src_ioremap(struct aac_dev *dev, u32 size)
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+{
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+ if (!size) {
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+ iounmap(dev->regs.src.bar0);
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+ dev->regs.src.bar0 = NULL;
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+ iounmap(dev->base);
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+ dev->base = NULL;
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+ return 0;
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+ }
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+ dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
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+ AAC_MIN_SRC_BAR1_SIZE);
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+ dev->base = NULL;
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+ if (dev->regs.src.bar1 == NULL)
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+ return -1;
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+ dev->base = dev->regs.src.bar0 = ioremap(dev->scsi_host_ptr->base,
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+ size);
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+ if (dev->base == NULL) {
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+ iounmap(dev->regs.src.bar1);
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+ dev->regs.src.bar1 = NULL;
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+ return -1;
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+ }
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+ dev->IndexRegs = &((struct src_registers __iomem *)
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+ dev->base)->IndexRegs;
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+ return 0;
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+}
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+
|
|
|
+static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
|
|
|
+{
|
|
|
+ u32 var, reset_mask;
|
|
|
+
|
|
|
+ if (bled >= 0) {
|
|
|
+ if (bled)
|
|
|
+ printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
|
|
|
+ dev->name, dev->id, bled);
|
|
|
+ bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
|
|
|
+ 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
|
|
|
+ if (bled || (var != 0x00000001))
|
|
|
+ bled = -EINVAL;
|
|
|
+ if (dev->supplement_adapter_info.SupportedOptions2 &
|
|
|
+ AAC_OPTION_DOORBELL_RESET) {
|
|
|
+ src_writel(dev, MUnit.IDR, reset_mask);
|
|
|
+ msleep(5000); /* Delay 5 seconds */
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (startup_timeout < 300)
|
|
|
+ startup_timeout = 300;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * aac_src_select_comm - Select communications method
|
|
|
+ * @dev: Adapter
|
|
|
+ * @comm: communications method
|
|
|
+ */
|
|
|
+int aac_src_select_comm(struct aac_dev *dev, int comm)
|
|
|
+{
|
|
|
+ switch (comm) {
|
|
|
+ case AAC_COMM_MESSAGE:
|
|
|
+ dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
|
|
|
+ dev->a_ops.adapter_intr = aac_src_intr_message;
|
|
|
+ dev->a_ops.adapter_deliver = aac_src_deliver_message;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * aac_src_init - initialize an Cardinal Frey Bar card
|
|
|
+ * @dev: device to configure
|
|
|
+ *
|
|
|
+ */
|
|
|
+
|
|
|
+int aac_src_init(struct aac_dev *dev)
|
|
|
+{
|
|
|
+ unsigned long start;
|
|
|
+ unsigned long status;
|
|
|
+ int restart = 0;
|
|
|
+ int instance = dev->id;
|
|
|
+ const char *name = dev->name;
|
|
|
+
|
|
|
+ dev->a_ops.adapter_ioremap = aac_src_ioremap;
|
|
|
+ dev->a_ops.adapter_comm = aac_src_select_comm;
|
|
|
+
|
|
|
+ dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
|
|
|
+ if (aac_adapter_ioremap(dev, dev->base_size)) {
|
|
|
+ printk(KERN_WARNING "%s: unable to map adapter.\n", name);
|
|
|
+ goto error_iounmap;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Failure to reset here is an option ... */
|
|
|
+ dev->a_ops.adapter_sync_cmd = src_sync_cmd;
|
|
|
+ dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
|
|
|
+ if ((aac_reset_devices || reset_devices) &&
|
|
|
+ !aac_src_restart_adapter(dev, 0))
|
|
|
+ ++restart;
|
|
|
+ /*
|
|
|
+ * Check to see if the board panic'd while booting.
|
|
|
+ */
|
|
|
+ status = src_readl(dev, MUnit.OMR);
|
|
|
+ if (status & KERNEL_PANIC) {
|
|
|
+ if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
|
|
|
+ goto error_iounmap;
|
|
|
+ ++restart;
|
|
|
+ }
|
|
|
+ /*
|
|
|
+ * Check to see if the board failed any self tests.
|
|
|
+ */
|
|
|
+ status = src_readl(dev, MUnit.OMR);
|
|
|
+ if (status & SELF_TEST_FAILED) {
|
|
|
+ printk(KERN_ERR "%s%d: adapter self-test failed.\n",
|
|
|
+ dev->name, instance);
|
|
|
+ goto error_iounmap;
|
|
|
+ }
|
|
|
+ /*
|
|
|
+ * Check to see if the monitor panic'd while booting.
|
|
|
+ */
|
|
|
+ if (status & MONITOR_PANIC) {
|
|
|
+ printk(KERN_ERR "%s%d: adapter monitor panic.\n",
|
|
|
+ dev->name, instance);
|
|
|
+ goto error_iounmap;
|
|
|
+ }
|
|
|
+ start = jiffies;
|
|
|
+ /*
|
|
|
+ * Wait for the adapter to be up and running. Wait up to 3 minutes
|
|
|
+ */
|
|
|
+ while (!((status = src_readl(dev, MUnit.OMR)) &
|
|
|
+ KERNEL_UP_AND_RUNNING)) {
|
|
|
+ if ((restart &&
|
|
|
+ (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
|
|
|
+ time_after(jiffies, start+HZ*startup_timeout)) {
|
|
|
+ printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
|
|
|
+ dev->name, instance, status);
|
|
|
+ goto error_iounmap;
|
|
|
+ }
|
|
|
+ if (!restart &&
|
|
|
+ ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
|
|
|
+ time_after(jiffies, start + HZ *
|
|
|
+ ((startup_timeout > 60)
|
|
|
+ ? (startup_timeout - 60)
|
|
|
+ : (startup_timeout / 2))))) {
|
|
|
+ if (likely(!aac_src_restart_adapter(dev,
|
|
|
+ aac_src_check_health(dev))))
|
|
|
+ start = jiffies;
|
|
|
+ ++restart;
|
|
|
+ }
|
|
|
+ msleep(1);
|
|
|
+ }
|
|
|
+ if (restart && aac_commit)
|
|
|
+ aac_commit = 1;
|
|
|
+ /*
|
|
|
+ * Fill in the common function dispatch table.
|
|
|
+ */
|
|
|
+ dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
|
|
|
+ dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
|
|
|
+ dev->a_ops.adapter_notify = aac_src_notify_adapter;
|
|
|
+ dev->a_ops.adapter_sync_cmd = src_sync_cmd;
|
|
|
+ dev->a_ops.adapter_check_health = aac_src_check_health;
|
|
|
+ dev->a_ops.adapter_restart = aac_src_restart_adapter;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * First clear out all interrupts. Then enable the one's that we
|
|
|
+ * can handle.
|
|
|
+ */
|
|
|
+ aac_adapter_comm(dev, AAC_COMM_MESSAGE);
|
|
|
+ aac_adapter_disable_int(dev);
|
|
|
+ src_writel(dev, MUnit.ODR_C, 0xffffffff);
|
|
|
+ aac_adapter_enable_int(dev);
|
|
|
+
|
|
|
+ if (aac_init_adapter(dev) == NULL)
|
|
|
+ goto error_iounmap;
|
|
|
+ if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
|
|
|
+ goto error_iounmap;
|
|
|
+
|
|
|
+ dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
|
|
|
+
|
|
|
+ if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
|
|
|
+ IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) {
|
|
|
+
|
|
|
+ if (dev->msi)
|
|
|
+ pci_disable_msi(dev->pdev);
|
|
|
+
|
|
|
+ printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
|
|
|
+ name, instance);
|
|
|
+ goto error_iounmap;
|
|
|
+ }
|
|
|
+ dev->dbg_base = pci_resource_start(dev->pdev, 2);
|
|
|
+ dev->dbg_base_mapped = dev->regs.src.bar1;
|
|
|
+ dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
|
|
|
+
|
|
|
+ aac_adapter_enable_int(dev);
|
|
|
+ /*
|
|
|
+ * Tell the adapter that all is configured, and it can
|
|
|
+ * start accepting requests
|
|
|
+ */
|
|
|
+ aac_src_start_adapter(dev);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+error_iounmap:
|
|
|
+
|
|
|
+ return -1;
|
|
|
+}
|
Mahesh Rajashekhara