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@@ -0,0 +1,562 @@
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+/*
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+ * Fitipower FC0013 tuner driver
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+ *
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+ * Copyright (C) 2012 Hans-Frieder Vogt <hfvogt@gmx.net>
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+ * partially based on driver code from Fitipower
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+ * Copyright (C) 2010 Fitipower Integrated Technology Inc
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ *
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+ */
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+
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+#include "fc0013.h"
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+#include "fc0013-priv.h"
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+
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+static int fc0013_writereg(struct fc0013_priv *priv, u8 reg, u8 val)
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+{
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+ u8 buf[2] = {reg, val};
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+ struct i2c_msg msg = {
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+ .addr = priv->addr, .flags = 0, .buf = buf, .len = 2
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+ };
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+
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+ if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
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+ err("I2C write reg failed, reg: %02x, val: %02x", reg, val);
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+ return -EREMOTEIO;
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+ }
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+ return 0;
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+}
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+
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+static int fc0013_readreg(struct fc0013_priv *priv, u8 reg, u8 *val)
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+{
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+ struct i2c_msg msg[2] = {
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+ { .addr = priv->addr, .flags = 0, .buf = ®, .len = 1 },
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+ { .addr = priv->addr, .flags = I2C_M_RD, .buf = val, .len = 1 },
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+ };
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+
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+ if (i2c_transfer(priv->i2c, msg, 2) != 2) {
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+ err("I2C read reg failed, reg: %02x", reg);
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+ return -EREMOTEIO;
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+ }
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+ return 0;
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+}
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+
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+static int fc0013_release(struct dvb_frontend *fe)
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+{
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+ kfree(fe->tuner_priv);
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+ fe->tuner_priv = NULL;
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+ return 0;
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+}
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+
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+static int fc0013_init(struct dvb_frontend *fe)
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+{
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+ struct fc0013_priv *priv = fe->tuner_priv;
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+ int i, ret = 0;
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+ unsigned char reg[] = {
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+ 0x00, /* reg. 0x00: dummy */
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+ 0x09, /* reg. 0x01 */
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+ 0x16, /* reg. 0x02 */
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+ 0x00, /* reg. 0x03 */
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+ 0x00, /* reg. 0x04 */
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+ 0x17, /* reg. 0x05 */
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+ 0x02, /* reg. 0x06 */
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+ 0x0a, /* reg. 0x07: CHECK */
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+ 0xff, /* reg. 0x08: AGC Clock divide by 256, AGC gain 1/256,
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+ Loop Bw 1/8 */
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+ 0x6f, /* reg. 0x09: enable LoopThrough */
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+ 0xb8, /* reg. 0x0a: Disable LO Test Buffer */
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+ 0x82, /* reg. 0x0b: CHECK */
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+ 0xfc, /* reg. 0x0c: depending on AGC Up-Down mode, may need 0xf8 */
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+ 0x01, /* reg. 0x0d: AGC Not Forcing & LNA Forcing, may need 0x02 */
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+ 0x00, /* reg. 0x0e */
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+ 0x00, /* reg. 0x0f */
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+ 0x00, /* reg. 0x10 */
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+ 0x00, /* reg. 0x11 */
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+ 0x00, /* reg. 0x12 */
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+ 0x00, /* reg. 0x13 */
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+ 0x50, /* reg. 0x14: DVB-t High Gain, UHF.
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+ Middle Gain: 0x48, Low Gain: 0x40 */
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+ 0x01, /* reg. 0x15 */
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+ };
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+
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+ switch (priv->xtal_freq) {
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+ case FC_XTAL_27_MHZ:
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+ case FC_XTAL_28_8_MHZ:
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+ reg[0x07] |= 0x20;
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+ break;
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+ case FC_XTAL_36_MHZ:
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+ default:
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+ break;
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+ }
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+
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+ if (priv->dual_master)
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+ reg[0x0c] |= 0x02;
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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+
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+ for (i = 1; i < sizeof(reg); i++) {
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+ ret = fc0013_writereg(priv, i, reg[i]);
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+ if (ret)
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+ break;
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+ }
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
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+
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+ if (ret)
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+ err("fc0013_writereg failed: %d", ret);
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+
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+ return ret;
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+}
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+
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+static int fc0013_sleep(struct dvb_frontend *fe)
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+{
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+ /* nothing to do here */
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+ return 0;
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+}
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+
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+int fc0013_rc_cal_add(struct dvb_frontend *fe, int rc_val)
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+{
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+ struct fc0013_priv *priv = fe->tuner_priv;
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+ int ret;
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+ u8 rc_cal;
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+ int val;
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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+
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+ /* push rc_cal value, get rc_cal value */
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+ ret = fc0013_writereg(priv, 0x10, 0x00);
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+ if (ret)
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+ goto error_out;
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+
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+ /* get rc_cal value */
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+ ret = fc0013_readreg(priv, 0x10, &rc_cal);
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+ if (ret)
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+ goto error_out;
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+
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+ rc_cal &= 0x0f;
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+
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+ val = (int)rc_cal + rc_val;
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+
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+ /* forcing rc_cal */
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+ ret = fc0013_writereg(priv, 0x0d, 0x11);
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+ if (ret)
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+ goto error_out;
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+
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+ /* modify rc_cal value */
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+ if (val > 15)
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+ ret = fc0013_writereg(priv, 0x10, 0x0f);
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+ else if (val < 0)
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+ ret = fc0013_writereg(priv, 0x10, 0x00);
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+ else
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+ ret = fc0013_writereg(priv, 0x10, (u8)val);
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+
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+error_out:
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
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+
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+ return ret;
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+}
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+EXPORT_SYMBOL(fc0013_rc_cal_add);
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+
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+int fc0013_rc_cal_reset(struct dvb_frontend *fe)
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+{
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+ struct fc0013_priv *priv = fe->tuner_priv;
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+ int ret;
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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+
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+ ret = fc0013_writereg(priv, 0x0d, 0x01);
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+ if (!ret)
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+ ret = fc0013_writereg(priv, 0x10, 0x00);
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
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+
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+ return ret;
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+}
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+EXPORT_SYMBOL(fc0013_rc_cal_reset);
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+
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+static int fc0013_set_vhf_track(struct fc0013_priv *priv, u32 freq)
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+{
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+ int ret;
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+ u8 tmp;
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+
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+ ret = fc0013_readreg(priv, 0x1d, &tmp);
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+ if (ret)
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+ goto error_out;
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+ tmp &= 0xe3;
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+ if (freq <= 177500) { /* VHF Track: 7 */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x1c);
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+ } else if (freq <= 184500) { /* VHF Track: 6 */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x18);
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+ } else if (freq <= 191500) { /* VHF Track: 5 */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x14);
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+ } else if (freq <= 198500) { /* VHF Track: 4 */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x10);
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+ } else if (freq <= 205500) { /* VHF Track: 3 */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x0c);
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+ } else if (freq <= 219500) { /* VHF Track: 2 */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x08);
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+ } else if (freq < 300000) { /* VHF Track: 1 */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x04);
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+ } else { /* UHF and GPS */
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+ ret = fc0013_writereg(priv, 0x1d, tmp | 0x1c);
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+ }
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+ if (ret)
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+ goto error_out;
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+error_out:
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+ return ret;
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+}
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+
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+static int fc0013_set_params(struct dvb_frontend *fe)
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+{
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+ struct fc0013_priv *priv = fe->tuner_priv;
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+ int i, ret = 0;
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+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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+ u32 freq = p->frequency / 1000;
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+ u32 delsys = p->delivery_system;
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+ unsigned char reg[7], am, pm, multi, tmp;
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+ unsigned long f_vco;
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+ unsigned short xtal_freq_khz_2, xin, xdiv;
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+ int vco_select = false;
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+
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+ if (fe->callback) {
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+ ret = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
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+ FC_FE_CALLBACK_VHF_ENABLE, (freq > 300000 ? 0 : 1));
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+ if (ret)
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+ goto exit;
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+ }
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+
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+ switch (priv->xtal_freq) {
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+ case FC_XTAL_27_MHZ:
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+ xtal_freq_khz_2 = 27000 / 2;
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+ break;
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+ case FC_XTAL_36_MHZ:
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+ xtal_freq_khz_2 = 36000 / 2;
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+ break;
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+ case FC_XTAL_28_8_MHZ:
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+ default:
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+ xtal_freq_khz_2 = 28800 / 2;
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+ break;
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+ }
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+
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+ if (fe->ops.i2c_gate_ctrl)
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+ fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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+
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+ /* set VHF track */
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+ ret = fc0013_set_vhf_track(priv, freq);
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+ if (ret)
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+ goto exit;
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+
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+ if (freq < 300000) {
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+ /* enable VHF filter */
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+ ret = fc0013_readreg(priv, 0x07, &tmp);
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+ if (ret)
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+ goto exit;
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+ ret = fc0013_writereg(priv, 0x07, tmp | 0x10);
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+ if (ret)
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+ goto exit;
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+
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+ /* disable UHF & disable GPS */
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+ ret = fc0013_readreg(priv, 0x14, &tmp);
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+ if (ret)
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+ goto exit;
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+ ret = fc0013_writereg(priv, 0x14, tmp & 0x1f);
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+ if (ret)
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+ goto exit;
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+ } else if (freq <= 862000) {
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+ /* disable VHF filter */
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+ ret = fc0013_readreg(priv, 0x07, &tmp);
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+ if (ret)
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+ goto exit;
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+ ret = fc0013_writereg(priv, 0x07, tmp & 0xef);
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+ if (ret)
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+ goto exit;
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+
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+ /* enable UHF & disable GPS */
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+ ret = fc0013_readreg(priv, 0x14, &tmp);
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+ if (ret)
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+ goto exit;
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+ ret = fc0013_writereg(priv, 0x14, (tmp & 0x1f) | 0x40);
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+ if (ret)
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+ goto exit;
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+ } else {
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+ /* disable VHF filter */
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+ ret = fc0013_readreg(priv, 0x07, &tmp);
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+ if (ret)
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+ goto exit;
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+ ret = fc0013_writereg(priv, 0x07, tmp & 0xef);
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+ if (ret)
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+ goto exit;
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+
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+ /* disable UHF & enable GPS */
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+ ret = fc0013_readreg(priv, 0x14, &tmp);
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+ if (ret)
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+ goto exit;
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+ ret = fc0013_writereg(priv, 0x14, (tmp & 0x1f) | 0x20);
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+ if (ret)
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+ goto exit;
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+ }
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+
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+ /* select frequency divider and the frequency of VCO */
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+ if (freq < 37084) { /* freq * 96 < 3560000 */
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+ multi = 96;
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+ reg[5] = 0x82;
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+ reg[6] = 0x00;
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+ } else if (freq < 55625) { /* freq * 64 < 3560000 */
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+ multi = 64;
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+ reg[5] = 0x02;
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+ reg[6] = 0x02;
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+ } else if (freq < 74167) { /* freq * 48 < 3560000 */
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+ multi = 48;
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+ reg[5] = 0x42;
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+ reg[6] = 0x00;
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+ } else if (freq < 111250) { /* freq * 32 < 3560000 */
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+ multi = 32;
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+ reg[5] = 0x82;
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+ reg[6] = 0x02;
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+ } else if (freq < 148334) { /* freq * 24 < 3560000 */
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+ multi = 24;
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+ reg[5] = 0x22;
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+ reg[6] = 0x00;
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+ } else if (freq < 222500) { /* freq * 16 < 3560000 */
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+ multi = 16;
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+ reg[5] = 0x42;
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+ reg[6] = 0x02;
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+ } else if (freq < 296667) { /* freq * 12 < 3560000 */
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+ multi = 12;
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+ reg[5] = 0x12;
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+ reg[6] = 0x00;
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+ } else if (freq < 445000) { /* freq * 8 < 3560000 */
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+ multi = 8;
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+ reg[5] = 0x22;
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+ reg[6] = 0x02;
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+ } else if (freq < 593334) { /* freq * 6 < 3560000 */
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+ multi = 6;
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+ reg[5] = 0x0a;
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+ reg[6] = 0x00;
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+ } else if (freq < 950000) { /* freq * 4 < 3800000 */
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+ multi = 4;
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+ reg[5] = 0x12;
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+ reg[6] = 0x02;
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+ } else {
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+ multi = 2;
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+ reg[5] = 0x0a;
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+ reg[6] = 0x02;
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+ }
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+
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+ f_vco = freq * multi;
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+
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+ if (f_vco >= 3060000) {
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+ reg[6] |= 0x08;
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+ vco_select = true;
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+ }
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+
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+ if (freq >= 45000) {
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+ /* From divided value (XDIV) determined the FA and FP value */
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+ xdiv = (unsigned short)(f_vco / xtal_freq_khz_2);
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+ if ((f_vco - xdiv * xtal_freq_khz_2) >= (xtal_freq_khz_2 / 2))
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+ xdiv++;
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+
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+ pm = (unsigned char)(xdiv / 8);
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+ am = (unsigned char)(xdiv - (8 * pm));
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+
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+ if (am < 2) {
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+ reg[1] = am + 8;
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+ reg[2] = pm - 1;
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+ } else {
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+ reg[1] = am;
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+ reg[2] = pm;
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+ }
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+ } else {
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+ /* fix for frequency less than 45 MHz */
|
|
|
+ reg[1] = 0x06;
|
|
|
+ reg[2] = 0x11;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* fix clock out */
|
|
|
+ reg[6] |= 0x20;
|
|
|
+
|
|
|
+ /* From VCO frequency determines the XIN ( fractional part of Delta
|
|
|
+ Sigma PLL) and divided value (XDIV) */
|
|
|
+ xin = (unsigned short)(f_vco - (f_vco / xtal_freq_khz_2) * xtal_freq_khz_2);
|
|
|
+ xin = (xin << 15) / xtal_freq_khz_2;
|
|
|
+ if (xin >= 16384)
|
|
|
+ xin += 32768;
|
|
|
+
|
|
|
+ reg[3] = xin >> 8;
|
|
|
+ reg[4] = xin & 0xff;
|
|
|
+
|
|
|
+ if (delsys == SYS_DVBT) {
|
|
|
+ reg[6] &= 0x3f; /* bits 6 and 7 describe the bandwidth */
|
|
|
+ switch (p->bandwidth_hz) {
|
|
|
+ case 6000000:
|
|
|
+ reg[6] |= 0x80;
|
|
|
+ break;
|
|
|
+ case 7000000:
|
|
|
+ reg[6] |= 0x40;
|
|
|
+ break;
|
|
|
+ case 8000000:
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ err("%s: modulation type not supported!", __func__);
|
|
|
+ return -EINVAL;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* modified for Realtek demod */
|
|
|
+ reg[5] |= 0x07;
|
|
|
+
|
|
|
+ for (i = 1; i <= 6; i++) {
|
|
|
+ ret = fc0013_writereg(priv, i, reg[i]);
|
|
|
+ if (ret)
|
|
|
+ goto exit;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = fc0013_readreg(priv, 0x11, &tmp);
|
|
|
+ if (ret)
|
|
|
+ goto exit;
|
|
|
+ if (multi == 64)
|
|
|
+ ret = fc0013_writereg(priv, 0x11, tmp | 0x04);
|
|
|
+ else
|
|
|
+ ret = fc0013_writereg(priv, 0x11, tmp & 0xfb);
|
|
|
+ if (ret)
|
|
|
+ goto exit;
|
|
|
+
|
|
|
+ /* VCO Calibration */
|
|
|
+ ret = fc0013_writereg(priv, 0x0e, 0x80);
|
|
|
+ if (!ret)
|
|
|
+ ret = fc0013_writereg(priv, 0x0e, 0x00);
|
|
|
+
|
|
|
+ /* VCO Re-Calibration if needed */
|
|
|
+ if (!ret)
|
|
|
+ ret = fc0013_writereg(priv, 0x0e, 0x00);
|
|
|
+
|
|
|
+ if (!ret) {
|
|
|
+ msleep(10);
|
|
|
+ ret = fc0013_readreg(priv, 0x0e, &tmp);
|
|
|
+ }
|
|
|
+ if (ret)
|
|
|
+ goto exit;
|
|
|
+
|
|
|
+ /* vco selection */
|
|
|
+ tmp &= 0x3f;
|
|
|
+
|
|
|
+ if (vco_select) {
|
|
|
+ if (tmp > 0x3c) {
|
|
|
+ reg[6] &= ~0x08;
|
|
|
+ ret = fc0013_writereg(priv, 0x06, reg[6]);
|
|
|
+ if (!ret)
|
|
|
+ ret = fc0013_writereg(priv, 0x0e, 0x80);
|
|
|
+ if (!ret)
|
|
|
+ ret = fc0013_writereg(priv, 0x0e, 0x00);
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ if (tmp < 0x02) {
|
|
|
+ reg[6] |= 0x08;
|
|
|
+ ret = fc0013_writereg(priv, 0x06, reg[6]);
|
|
|
+ if (!ret)
|
|
|
+ ret = fc0013_writereg(priv, 0x0e, 0x80);
|
|
|
+ if (!ret)
|
|
|
+ ret = fc0013_writereg(priv, 0x0e, 0x00);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ priv->frequency = p->frequency;
|
|
|
+ priv->bandwidth = p->bandwidth_hz;
|
|
|
+
|
|
|
+exit:
|
|
|
+ if (fe->ops.i2c_gate_ctrl)
|
|
|
+ fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int fc0013_get_frequency(struct dvb_frontend *fe, u32 *frequency)
|
|
|
+{
|
|
|
+ struct fc0013_priv *priv = fe->tuner_priv;
|
|
|
+ *frequency = priv->frequency;
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int fc0013_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
|
|
|
+{
|
|
|
+ /* always ? */
|
|
|
+ *frequency = 0;
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int fc0013_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
|
|
|
+{
|
|
|
+ struct fc0013_priv *priv = fe->tuner_priv;
|
|
|
+ *bandwidth = priv->bandwidth;
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+static const struct dvb_tuner_ops fc0013_tuner_ops = {
|
|
|
+ .info = {
|
|
|
+ .name = "Fitipower FC0013",
|
|
|
+
|
|
|
+ .frequency_min = 37000000, /* estimate */
|
|
|
+ .frequency_max = 1680000000, /* CHECK */
|
|
|
+ .frequency_step = 0,
|
|
|
+ },
|
|
|
+
|
|
|
+ .release = fc0013_release,
|
|
|
+
|
|
|
+ .init = fc0013_init,
|
|
|
+ .sleep = fc0013_sleep,
|
|
|
+
|
|
|
+ .set_params = fc0013_set_params,
|
|
|
+
|
|
|
+ .get_frequency = fc0013_get_frequency,
|
|
|
+ .get_if_frequency = fc0013_get_if_frequency,
|
|
|
+ .get_bandwidth = fc0013_get_bandwidth,
|
|
|
+};
|
|
|
+
|
|
|
+struct dvb_frontend *fc0013_attach(struct dvb_frontend *fe,
|
|
|
+ struct i2c_adapter *i2c, u8 i2c_address, int dual_master,
|
|
|
+ enum fc001x_xtal_freq xtal_freq)
|
|
|
+{
|
|
|
+ struct fc0013_priv *priv = NULL;
|
|
|
+
|
|
|
+ priv = kzalloc(sizeof(struct fc0013_priv), GFP_KERNEL);
|
|
|
+ if (priv == NULL)
|
|
|
+ return NULL;
|
|
|
+
|
|
|
+ priv->i2c = i2c;
|
|
|
+ priv->dual_master = dual_master;
|
|
|
+ priv->addr = i2c_address;
|
|
|
+ priv->xtal_freq = xtal_freq;
|
|
|
+
|
|
|
+ info("Fitipower FC0013 successfully attached.");
|
|
|
+
|
|
|
+ fe->tuner_priv = priv;
|
|
|
+
|
|
|
+ memcpy(&fe->ops.tuner_ops, &fc0013_tuner_ops,
|
|
|
+ sizeof(struct dvb_tuner_ops));
|
|
|
+
|
|
|
+ return fe;
|
|
|
+}
|
|
|
+EXPORT_SYMBOL(fc0013_attach);
|
|
|
+
|
|
|
+MODULE_DESCRIPTION("Fitipower FC0013 silicon tuner driver");
|
|
|
+MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>");
|
|
|
+MODULE_LICENSE("GPL");
|
|
|
+MODULE_VERSION("0.1");
|