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@@ -31,7 +31,6 @@
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#include <linux/etherdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/ethtool.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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-#include <linux/aer.h>
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#include <linux/ip.h>
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#include <linux/ip.h>
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#include <net/ip.h>
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#include <net/ip.h>
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#include <linux/tcp.h>
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#include <linux/tcp.h>
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@@ -240,22 +239,21 @@ static void sky2_power_on(struct sky2_hw *hw)
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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sky2_write8(hw, B2_Y2_CLK_GATE, 0);
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if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
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if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
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- struct pci_dev *pdev = hw->pdev;
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u32 reg;
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u32 reg;
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- pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
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+ sky2_pci_write32(hw, PCI_DEV_REG3, 0);
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- pci_read_config_dword(pdev, PCI_DEV_REG4, ®);
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+ reg = sky2_pci_read32(hw, PCI_DEV_REG4);
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/* set all bits to 0 except bits 15..12 and 8 */
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/* set all bits to 0 except bits 15..12 and 8 */
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reg &= P_ASPM_CONTROL_MSK;
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reg &= P_ASPM_CONTROL_MSK;
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- pci_write_config_dword(pdev, PCI_DEV_REG4, reg);
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+ sky2_pci_write32(hw, PCI_DEV_REG4, reg);
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- pci_read_config_dword(pdev, PCI_DEV_REG5, ®);
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+ reg = sky2_pci_read32(hw, PCI_DEV_REG5);
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/* set all bits to 0 except bits 28 & 27 */
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/* set all bits to 0 except bits 28 & 27 */
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reg &= P_CTL_TIM_VMAIN_AV_MSK;
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reg &= P_CTL_TIM_VMAIN_AV_MSK;
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- pci_write_config_dword(pdev, PCI_DEV_REG5, reg);
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+ sky2_pci_write32(hw, PCI_DEV_REG5, reg);
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- pci_write_config_dword(pdev, PCI_CFG_REG_1, 0);
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+ sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
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/* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
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/* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
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reg = sky2_read32(hw, B2_GP_IO);
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reg = sky2_read32(hw, B2_GP_IO);
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@@ -619,12 +617,11 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
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static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
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static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
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{
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{
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- struct pci_dev *pdev = hw->pdev;
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u32 reg1;
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u32 reg1;
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static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
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static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
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static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
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static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
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- pci_read_config_dword(pdev, PCI_DEV_REG1, ®1);
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+ reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
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/* Turn on/off phy power saving */
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/* Turn on/off phy power saving */
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if (onoff)
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if (onoff)
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reg1 &= ~phy_power[port];
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reg1 &= ~phy_power[port];
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@@ -634,8 +631,8 @@ static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
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if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
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reg1 |= coma_mode[port];
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reg1 |= coma_mode[port];
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- pci_write_config_dword(pdev, PCI_DEV_REG1, reg1);
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- pci_read_config_dword(pdev, PCI_DEV_REG1, ®1);
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+ sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
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+ reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
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udelay(100);
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udelay(100);
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}
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}
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@@ -704,9 +701,9 @@ static void sky2_wol_init(struct sky2_port *sky2)
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sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
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sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
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/* Turn on legacy PCI-Express PME mode */
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/* Turn on legacy PCI-Express PME mode */
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- pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1);
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+ reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
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reg1 |= PCI_Y2_PME_LEGACY;
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reg1 |= PCI_Y2_PME_LEGACY;
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- pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
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+ sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
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/* block receiver */
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/* block receiver */
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sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
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sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
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@@ -848,6 +845,13 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
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sky2_set_tx_stfwd(hw, port);
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sky2_set_tx_stfwd(hw, port);
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}
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}
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+ if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
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+ hw->chip_rev == CHIP_REV_YU_FE2_A0) {
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+ /* disable dynamic watermark */
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+ reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
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+ reg &= ~TX_DYN_WM_ENA;
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+ sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
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+ }
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}
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}
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/* Assign Ram Buffer allocation to queue */
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/* Assign Ram Buffer allocation to queue */
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@@ -1320,15 +1324,12 @@ static int sky2_up(struct net_device *dev)
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*/
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*/
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if (otherdev && netif_running(otherdev) &&
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if (otherdev && netif_running(otherdev) &&
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(cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
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(cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
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- struct sky2_port *osky2 = netdev_priv(otherdev);
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u16 cmd;
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u16 cmd;
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- pci_read_config_word(hw->pdev, cap + PCI_X_CMD, &cmd);
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+ cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
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cmd &= ~PCI_X_CMD_MAX_SPLIT;
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cmd &= ~PCI_X_CMD_MAX_SPLIT;
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- pci_write_config_word(hw->pdev, cap + PCI_X_CMD, cmd);
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+ sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
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- sky2->rx_csum = 0;
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- osky2->rx_csum = 0;
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}
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}
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if (netif_msg_ifup(sky2))
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if (netif_msg_ifup(sky2))
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@@ -2426,37 +2427,26 @@ static void sky2_hw_intr(struct sky2_hw *hw)
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if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
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if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
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u16 pci_err;
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u16 pci_err;
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- pci_read_config_word(pdev, PCI_STATUS, &pci_err);
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+ pci_err = sky2_pci_read16(hw, PCI_STATUS);
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if (net_ratelimit())
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if (net_ratelimit())
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dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
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dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
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pci_err);
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pci_err);
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- pci_write_config_word(pdev, PCI_STATUS,
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+ sky2_pci_write16(hw, PCI_STATUS,
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pci_err | PCI_STATUS_ERROR_BITS);
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pci_err | PCI_STATUS_ERROR_BITS);
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}
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}
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if (status & Y2_IS_PCI_EXP) {
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if (status & Y2_IS_PCI_EXP) {
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/* PCI-Express uncorrectable Error occurred */
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/* PCI-Express uncorrectable Error occurred */
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- int aer = pci_find_aer_capability(hw->pdev);
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u32 err;
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u32 err;
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- if (aer) {
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- pci_read_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS,
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- &err);
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- pci_cleanup_aer_uncorrect_error_status(pdev);
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- } else {
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- /* Either AER not configured, or not working
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- * because of bad MMCONFIG, so just do recover
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- * manually.
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- */
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- err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
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- sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
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- 0xfffffffful);
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- }
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-
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+ err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
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+ sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
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+ 0xfffffffful);
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if (net_ratelimit())
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if (net_ratelimit())
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dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
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dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
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+ sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
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}
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}
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if (status & Y2_HWE_L1_MASK)
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if (status & Y2_HWE_L1_MASK)
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@@ -2703,13 +2693,10 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
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static int __devinit sky2_init(struct sky2_hw *hw)
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static int __devinit sky2_init(struct sky2_hw *hw)
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{
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{
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- int rc;
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u8 t8;
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u8 t8;
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/* Enable all clocks and check for bad PCI access */
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/* Enable all clocks and check for bad PCI access */
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- rc = pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0);
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- if (rc)
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- return rc;
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+ sky2_pci_write32(hw, PCI_DEV_REG3, 0);
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sky2_write8(hw, B0_CTST, CS_RST_CLR);
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sky2_write8(hw, B0_CTST, CS_RST_CLR);
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@@ -2806,32 +2793,21 @@ static void sky2_reset(struct sky2_hw *hw)
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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/* clear PCI errors, if any */
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/* clear PCI errors, if any */
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- pci_read_config_word(pdev, PCI_STATUS, &status);
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+ status = sky2_pci_read16(hw, PCI_STATUS);
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status |= PCI_STATUS_ERROR_BITS;
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status |= PCI_STATUS_ERROR_BITS;
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- pci_write_config_word(pdev, PCI_STATUS, status);
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+ sky2_pci_write16(hw, PCI_STATUS, status);
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sky2_write8(hw, B0_CTST, CS_MRST_CLR);
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sky2_write8(hw, B0_CTST, CS_MRST_CLR);
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cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
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cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
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if (cap) {
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if (cap) {
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- if (pci_find_aer_capability(pdev)) {
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- /* Check for advanced error reporting */
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- pci_cleanup_aer_uncorrect_error_status(pdev);
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- pci_cleanup_aer_correct_error_status(pdev);
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- } else {
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- dev_warn(&pdev->dev,
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- "PCI Express Advanced Error Reporting"
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- " not configured or MMCONFIG problem?\n");
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-
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- sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
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- 0xfffffffful);
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- }
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+ sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
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+ 0xfffffffful);
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/* If error bit is stuck on ignore it */
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/* If error bit is stuck on ignore it */
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if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
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if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
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dev_info(&pdev->dev, "ignoring stuck error report bit\n");
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dev_info(&pdev->dev, "ignoring stuck error report bit\n");
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-
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- else if (pci_enable_pcie_error_reporting(pdev))
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+ else
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hwe_mask |= Y2_IS_PCI_EXP;
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hwe_mask |= Y2_IS_PCI_EXP;
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}
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}
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@@ -3672,32 +3648,33 @@ static int sky2_set_tso(struct net_device *dev, u32 data)
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static int sky2_get_eeprom_len(struct net_device *dev)
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static int sky2_get_eeprom_len(struct net_device *dev)
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{
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{
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struct sky2_port *sky2 = netdev_priv(dev);
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struct sky2_port *sky2 = netdev_priv(dev);
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+ struct sky2_hw *hw = sky2->hw;
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u16 reg2;
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u16 reg2;
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- pci_read_config_word(sky2->hw->pdev, PCI_DEV_REG2, ®2);
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+ reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
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return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
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return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
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}
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}
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-static u32 sky2_vpd_read(struct pci_dev *pdev, int cap, u16 offset)
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+static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset)
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{
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{
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u32 val;
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u32 val;
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- pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset);
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+ sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
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do {
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do {
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- pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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+ offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
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} while (!(offset & PCI_VPD_ADDR_F));
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} while (!(offset & PCI_VPD_ADDR_F));
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- pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val);
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+ val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
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return val;
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return val;
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}
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}
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-static void sky2_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val)
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+static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val)
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{
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{
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- pci_write_config_word(pdev, cap + PCI_VPD_DATA, val);
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- pci_write_config_dword(pdev, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
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+ sky2_pci_write16(hw, cap + PCI_VPD_DATA, val);
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+ sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
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do {
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do {
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- pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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+ offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
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} while (offset & PCI_VPD_ADDR_F);
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} while (offset & PCI_VPD_ADDR_F);
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}
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}
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@@ -3715,7 +3692,7 @@ static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
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eeprom->magic = SKY2_EEPROM_MAGIC;
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eeprom->magic = SKY2_EEPROM_MAGIC;
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while (length > 0) {
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while (length > 0) {
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- u32 val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
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+ u32 val = sky2_vpd_read(sky2->hw, cap, offset);
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int n = min_t(int, length, sizeof(val));
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int n = min_t(int, length, sizeof(val));
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memcpy(data, &val, n);
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memcpy(data, &val, n);
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@@ -3745,10 +3722,10 @@ static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
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int n = min_t(int, length, sizeof(val));
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int n = min_t(int, length, sizeof(val));
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if (n < sizeof(val))
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if (n < sizeof(val))
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- val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
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|
|
|
+ val = sky2_vpd_read(sky2->hw, cap, offset);
|
|
memcpy(&val, data, n);
|
|
memcpy(&val, data, n);
|
|
|
|
|
|
- sky2_vpd_write(sky2->hw->pdev, cap, offset, val);
|
|
|
|
|
|
+ sky2_vpd_write(sky2->hw, cap, offset, val);
|
|
|
|
|
|
length -= n;
|
|
length -= n;
|
|
data += n;
|
|
data += n;
|
|
@@ -4013,7 +3990,7 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
|
|
sky2->duplex = -1;
|
|
sky2->duplex = -1;
|
|
sky2->speed = -1;
|
|
sky2->speed = -1;
|
|
sky2->advertising = sky2_supported_modes(hw);
|
|
sky2->advertising = sky2_supported_modes(hw);
|
|
- sky2->rx_csum = 1;
|
|
|
|
|
|
+ sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL);
|
|
sky2->wol = wol;
|
|
sky2->wol = wol;
|
|
|
|
|
|
spin_lock_init(&sky2->phy_lock);
|
|
spin_lock_init(&sky2->phy_lock);
|
|
@@ -4184,9 +4161,9 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
|
|
*/
|
|
*/
|
|
{
|
|
{
|
|
u32 reg;
|
|
u32 reg;
|
|
- pci_read_config_dword(pdev,PCI_DEV_REG2, ®);
|
|
|
|
|
|
+ reg = sky2_pci_read32(hw, PCI_DEV_REG2);
|
|
reg &= ~PCI_REV_DESC;
|
|
reg &= ~PCI_REV_DESC;
|
|
- pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
|
|
|
|
|
|
+ sky2_pci_write32(hw, PCI_DEV_REG2, reg);
|
|
}
|
|
}
|
|
#endif
|
|
#endif
|
|
|
|
|
|
@@ -4377,7 +4354,7 @@ static int sky2_resume(struct pci_dev *pdev)
|
|
if (hw->chip_id == CHIP_ID_YUKON_EX ||
|
|
if (hw->chip_id == CHIP_ID_YUKON_EX ||
|
|
hw->chip_id == CHIP_ID_YUKON_EC_U ||
|
|
hw->chip_id == CHIP_ID_YUKON_EC_U ||
|
|
hw->chip_id == CHIP_ID_YUKON_FE_P)
|
|
hw->chip_id == CHIP_ID_YUKON_FE_P)
|
|
- pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
|
|
|
|
|
|
+ sky2_pci_write32(hw, PCI_DEV_REG3, 0);
|
|
|
|
|
|
sky2_reset(hw);
|
|
sky2_reset(hw);
|
|
sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
|
|
sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
|