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@@ -12,6 +12,11 @@
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* PCI Local Bus Specification
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* PCI to PCI Bridge Specification
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* PCI System Design Guide
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+ *
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+ * For hypertransport information, please consult the following manuals
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+ * from http://www.hypertransport.org
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+ *
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+ * The Hypertransport I/O Link Specification
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*/
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#ifndef LINUX_PCI_REGS_H
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@@ -463,4 +468,20 @@
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#define PCI_PWR_CAP 12 /* Capability */
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#define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */
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+/* Hypertransport sub capability types */
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+#define HT_CAPTYPE_SLAVE 0x00 /* Slave/Primary link configuration */
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+#define HT_CAPTYPE_HOST 0x20 /* Host/Secondary link configuration */
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+#define HT_CAPTYPE_IRQ 0x80 /* IRQ Configuration */
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+#define HT_CAPTYPE_REMAPPING_40 0xA0 /* 40 bit address remapping */
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+#define HT_CAPTYPE_REMAPPING_64 0xA2 /* 64 bit address remapping */
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+#define HT_CAPTYPE_UNITID_CLUMP 0x90 /* Unit ID clumping */
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+#define HT_CAPTYPE_EXTCONF 0x98 /* Extended Configuration Space Access */
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+#define HT_CAPTYPE_MSI_MAPPING 0xA8 /* MSI Mapping Capability */
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+#define HT_CAPTYPE_DIRECT_ROUTE 0xB0 /* Direct routing configuration */
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+#define HT_CAPTYPE_VCSET 0xB8 /* Virtual Channel configuration */
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+#define HT_CAPTYPE_ERROR_RETRY 0xC0 /* Retry on error configuration */
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+#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */
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+#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */
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+
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+
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#endif /* LINUX_PCI_REGS_H */
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