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@@ -97,7 +97,11 @@ extern void breakh_BUG(void);
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/*
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* Build the IRQ handler stubs using macros from irq.h.
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*/
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+#ifdef CONFIG_CRIS_MACH_ARTPEC3
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+BUILD_TIMER_IRQ(0x31, 0)
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+#else
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BUILD_IRQ(0x31)
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+#endif
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BUILD_IRQ(0x32)
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BUILD_IRQ(0x33)
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BUILD_IRQ(0x34)
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@@ -123,7 +127,11 @@ BUILD_IRQ(0x47)
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BUILD_IRQ(0x48)
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BUILD_IRQ(0x49)
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BUILD_IRQ(0x4a)
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+#ifdef CONFIG_ETRAXFS
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+BUILD_TIMER_IRQ(0x4b, 0)
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+#else
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BUILD_IRQ(0x4b)
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+#endif
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BUILD_IRQ(0x4c)
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BUILD_IRQ(0x4d)
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BUILD_IRQ(0x4e)
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@@ -199,25 +207,20 @@ block_irq(int irq, int cpu)
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unsigned long flags;
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spin_lock_irqsave(&irq_lock, flags);
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- if (irq - FIRST_IRQ < 32)
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+ /* Remember, 1 let thru, 0 block. */
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+ if (irq - FIRST_IRQ < 32) {
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intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
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rw_mask, 0);
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- else
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- intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
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- rw_mask, 1);
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-
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- /* Remember; 1 let thru, 0 block. */
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- if (irq - FIRST_IRQ < 32)
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intr_mask &= ~(1 << (irq - FIRST_IRQ));
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- else
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- intr_mask &= ~(1 << (irq - FIRST_IRQ - 32));
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-
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- if (irq - FIRST_IRQ < 32)
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REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
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0, intr_mask);
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- else
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+ } else {
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+ intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
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+ rw_mask, 1);
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+ intr_mask &= ~(1 << (irq - FIRST_IRQ - 32));
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REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
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1, intr_mask);
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+ }
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spin_unlock_irqrestore(&irq_lock, flags);
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}
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@@ -228,26 +231,20 @@ unblock_irq(int irq, int cpu)
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unsigned long flags;
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spin_lock_irqsave(&irq_lock, flags);
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- if (irq - FIRST_IRQ < 32)
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+ /* Remember, 1 let thru, 0 block. */
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+ if (irq - FIRST_IRQ < 32) {
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intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
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rw_mask, 0);
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- else
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- intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
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- rw_mask, 1);
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-
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- /* Remember; 1 let thru, 0 block. */
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- if (irq - FIRST_IRQ < 32)
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intr_mask |= (1 << (irq - FIRST_IRQ));
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- else
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- intr_mask |= (1 << (irq - FIRST_IRQ - 32));
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-
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- if (irq - FIRST_IRQ < 32)
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REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
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0, intr_mask);
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- else
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+ } else {
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+ intr_mask = REG_RD_INT_VECT(intr_vect, irq_regs[cpu],
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+ rw_mask, 1);
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+ intr_mask |= (1 << (irq - FIRST_IRQ - 32));
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REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
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1, intr_mask);
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-
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+ }
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spin_unlock_irqrestore(&irq_lock, flags);
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}
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