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@@ -12,7 +12,6 @@
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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-#include <linux/spinlock.h>
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#include <linux/seqlock.h>
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#include <asm/timer.h>
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#include <asm/io.h>
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@@ -28,9 +27,6 @@
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* However, we can implement channel cascade if we go the overflow route and
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* get away with using 2 MTU2 channels as a 32-bit timer.
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*/
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-
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-static DEFINE_SPINLOCK(mtu2_lock);
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-
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#define MTU2_TSTR 0xfffe4280
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#define MTU2_TCR_1 0xfffe4380
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#define MTU2_TMDR_1 0xfffe4381
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@@ -55,8 +51,6 @@ static DEFINE_SPINLOCK(mtu2_lock);
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static unsigned long mtu2_timer_get_offset(void)
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{
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int count;
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- unsigned long flags;
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-
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static int count_p = 0x7fff; /* for the first call after boot */
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static unsigned long jiffies_p = 0;
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@@ -65,7 +59,6 @@ static unsigned long mtu2_timer_get_offset(void)
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*/
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unsigned long jiffies_t;
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- spin_lock_irqsave(&mtu2_lock, flags);
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/* timer count may underflow right here */
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count = ctrl_inw(MTU2_TCNT_1); /* read the latched count */
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@@ -90,7 +83,6 @@ static unsigned long mtu2_timer_get_offset(void)
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jiffies_p = jiffies_t;
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count_p = count;
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- spin_unlock_irqrestore(&mtu2_lock, flags);
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count = ((LATCH-1) - count) * TICK_SIZE;
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count = (count + LATCH/2) / LATCH;
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@@ -118,7 +110,7 @@ static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id)
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static struct irqaction mtu2_irq = {
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.name = "timer",
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.handler = mtu2_timer_interrupt,
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- .flags = IRQF_DISABLED,
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+ .flags = IRQF_DISABLED | IRQF_TIMER,
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.mask = CPU_MASK_NONE,
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};
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