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@@ -2526,6 +2526,11 @@ static void ath9k_ani_reset(struct ath_hal *ah)
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}
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}
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+/*
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+ * Process a MIB interrupt. We may potentially be invoked because
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+ * any of the MIB counters overflow/trigger so don't assume we're
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+ * here because a PHY error counter triggered.
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+ */
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void ath9k_hw_procmibevent(struct ath_hal *ah,
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const struct ath9k_node_stats *stats)
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{
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@@ -2533,18 +2538,20 @@ void ath9k_hw_procmibevent(struct ath_hal *ah,
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u32 phyCnt1, phyCnt2;
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DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Processing Mib Intr\n");
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-
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+ /* Reset these counters regardless */
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REG_WRITE(ah, AR_FILT_OFDM, 0);
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REG_WRITE(ah, AR_FILT_CCK, 0);
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if (!(REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING))
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REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);
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+ /* Clear the mib counters and save them in the stats */
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ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);
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ahp->ah_stats.ast_nodestats = *stats;
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if (!DO_ANI(ah))
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return;
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+ /* NB: these are not reset-on-read */
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phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
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phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
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if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) ||
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@@ -2552,6 +2559,7 @@ void ath9k_hw_procmibevent(struct ath_hal *ah,
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struct ar5416AniState *aniState = ahp->ah_curani;
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u32 ofdmPhyErrCnt, cckPhyErrCnt;
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+ /* NB: only use ast_ani_*errs with AH_PRIVATE_DIAG */
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ofdmPhyErrCnt = phyCnt1 - aniState->ofdmPhyErrBase;
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ahp->ah_stats.ast_ani_ofdmerrs +=
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ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
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@@ -2562,11 +2570,17 @@ void ath9k_hw_procmibevent(struct ath_hal *ah,
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cckPhyErrCnt - aniState->cckPhyErrCount;
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aniState->cckPhyErrCount = cckPhyErrCnt;
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+ /*
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+ * NB: figure out which counter triggered. If both
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+ * trigger we'll only deal with one as the processing
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+ * clobbers the error counter so the trigger threshold
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+ * check will never be true.
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+ */
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if (aniState->ofdmPhyErrCount > aniState->ofdmTrigHigh)
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ath9k_hw_ani_ofdm_err_trigger(ah);
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if (aniState->cckPhyErrCount > aniState->cckTrigHigh)
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ath9k_hw_ani_cck_err_trigger(ah);
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-
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+ /* NB: always restart to insure the h/w counters are reset */
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ath9k_ani_restart(ah);
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}
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}
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Luis R. Rodriguez