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@@ -32,7 +32,6 @@
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#include <linux/micrel_phy.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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-#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/system_misc.h>
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@@ -352,44 +351,10 @@ static void __init imx6q_map_io(void)
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imx_scu_map_io();
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}
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-#ifdef CONFIG_CACHE_L2X0
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-static void __init imx6q_init_l2cache(void)
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-{
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- void __iomem *l2x0_base;
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- struct device_node *np;
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- unsigned int val;
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-
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- np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
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- if (!np)
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- goto out;
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-
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- l2x0_base = of_iomap(np, 0);
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- if (!l2x0_base) {
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- of_node_put(np);
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- goto out;
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- }
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-
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- /* Configure the L2 PREFETCH and POWER registers */
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- val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
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- val |= 0x70800000;
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- writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
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- val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
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- writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
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-
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- iounmap(l2x0_base);
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- of_node_put(np);
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-
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-out:
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- l2x0_of_init(0, ~0UL);
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-}
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-#else
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-static inline void imx6q_init_l2cache(void) {}
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-#endif
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-
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static void __init imx6q_init_irq(void)
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{
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imx6q_init_revision();
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- imx6q_init_l2cache();
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+ imx_init_l2cache();
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imx_src_init();
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imx_gpc_init();
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irqchip_init();
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