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@@ -20,6 +20,7 @@
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#include <asm/mach-types.h>
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#include <asm/arch/board-eb.h>
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+#include <asm/arch/board-pb11mp.h>
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#include <asm/arch/scu.h>
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extern void realview_secondary_startup(void);
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@@ -37,6 +38,8 @@ static unsigned int __init get_core_count(void)
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if (machine_is_realview_eb() && core_tile_eb11mp())
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scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
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+ else if (machine_is_realview_pb11mp())
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+ scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
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if (scu_base) {
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ncores = __raw_readl(scu_base + SCU_CONFIG);
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@@ -57,6 +60,8 @@ static void scu_enable(void)
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if (machine_is_realview_eb() && core_tile_eb11mp())
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scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
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+ else if (machine_is_realview_pb11mp())
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+ scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
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else
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BUG();
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@@ -81,7 +86,10 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
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* core (e.g. timer irq), then they will not have been enabled
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* for us: do so
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*/
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- gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
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+ if (machine_is_realview_eb() && core_tile_eb11mp())
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+ gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
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+ else if (machine_is_realview_pb11mp())
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+ gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
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/*
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* let the primary processor know we're out of the
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@@ -222,7 +230,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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* dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
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* realview_timer_init
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*/
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- if (machine_is_realview_eb() && core_tile_eb11mp())
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+ if ((machine_is_realview_eb() && core_tile_eb11mp()) ||
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+ machine_is_realview_pb11mp())
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local_timer_setup(cpu);
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#endif
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