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@@ -1,334 +0,0 @@
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-/*
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- *
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- * By Dustin McIntire (dustin@sensoria.com) (c)2001
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- *
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- * Setup and IRQ handling code for the HD64465 companion chip.
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- * by Greg Banks <gbanks@pocketpenguins.com>
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- * Copyright (c) 2000 PocketPenguins Inc
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- *
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- * Derived from setup_hd64465.c which bore the message:
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- * Greg Banks <gbanks@pocketpenguins.com>
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- * Copyright (c) 2000 PocketPenguins Inc and
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- * Copyright (C) 2000 YAEGASHI Takeshi
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- * and setup_cqreek.c which bore message:
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- * Copyright (C) 2000 Niibe Yutaka
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- *
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- * May be copied or modified under the terms of the GNU General Public
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- * License. See linux/COPYING for more information.
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- *
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- * IRQ functions for a Hitachi Big Sur Evaluation Board.
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- *
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- */
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-#undef DEBUG
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-
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-#include <linux/sched.h>
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-#include <linux/module.h>
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-#include <linux/kernel.h>
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-#include <linux/param.h>
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-#include <linux/ioport.h>
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-#include <linux/interrupt.h>
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-#include <linux/init.h>
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-#include <linux/irq.h>
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-#include <linux/bitops.h>
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-
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-#include <asm/io.h>
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-#include <asm/irq.h>
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-
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-#include <asm/bigsur/io.h>
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-#include <asm/hd64465/hd64465.h>
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-#include <asm/bigsur/bigsur.h>
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-
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-//#define BIGSUR_DEBUG 3
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-#undef BIGSUR_DEBUG
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-
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-#ifdef BIGSUR_DEBUG
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-#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
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-#else
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-#define DIPRINTK(n, args...)
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-#endif /* BIGSUR_DEBUG */
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-
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-#ifdef CONFIG_HD64465
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-extern int hd64465_irq_demux(int irq);
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-#endif /* CONFIG_HD64465 */
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-
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-
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-/*===========================================================*/
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-// Big Sur CPLD IRQ Routines
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-/*===========================================================*/
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-
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-/* Level 1 IRQ routines */
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-static void disable_bigsur_l1irq(unsigned int irq)
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-{
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- unsigned char mask;
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- unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
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- unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
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-
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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- pr_debug("Disable L1 IRQ %d\n", irq);
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- DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
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- mask_port, bit);
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-
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- /* Disable IRQ - set mask bit */
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- mask = inb(mask_port) | bit;
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- outb(mask, mask_port);
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- return;
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- }
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- pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
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-}
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-
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-static void enable_bigsur_l1irq(unsigned int irq)
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-{
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- unsigned char mask;
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- unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
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- unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
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-
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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- pr_debug("Enable L1 IRQ %d\n", irq);
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- DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
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- mask_port, bit);
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- /* Enable L1 IRQ - clear mask bit */
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- mask = inb(mask_port) & ~bit;
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- outb(mask, mask_port);
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- return;
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- }
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- pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
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-}
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-
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-
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-/* Level 2 irq masks and registers for L2 decoding */
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-/* Level2 bitmasks for each level 1 IRQ */
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-const u32 bigsur_l2irq_mask[] =
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- {0x40,0x80,0x08,0x01,0x01,0x3C,0x3E,0xFF,0x40,0x80,0x06,0x03};
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-/* Level2 to ISR[n] map for each level 1 IRQ */
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-const u32 bigsur_l2irq_reg[] =
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- { 2, 2, 3, 3, 1, 2, 1, 0, 1, 1, 3, 2};
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-/* Level2 to Level 1 IRQ map */
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-const u32 bigsur_l2_l1_map[] =
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- {7,7,7,7,7,7,7,7, 4,6,6,6,6,6,8,9, 11,11,5,5,5,5,0,1, 3,10,10,2,-1,-1,-1,-1};
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-/* IRQ inactive level (high or low) */
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-const u32 bigsur_l2_inactv_state[] = {0x00, 0xBE, 0xFC, 0xF7};
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-
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-/* CPLD external status and mask registers base and offsets */
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-static const u32 isr_base = BIGSUR_IRQ0;
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-static const u32 isr_offset = BIGSUR_IRQ0 - BIGSUR_IRQ1;
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-static const u32 imr_base = BIGSUR_IMR0;
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-static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
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-
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-#define REG_NUM(irq) ((irq-BIGSUR_2NDLVL_IRQ_LOW)/8 )
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-
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-/* Level 2 IRQ routines */
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-static void disable_bigsur_l2irq(unsigned int irq)
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-{
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- unsigned char mask;
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- unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
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- unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
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-
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- if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
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- pr_debug("Disable L2 IRQ %d\n", irq);
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- DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
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- mask_port, bit);
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-
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- /* Disable L2 IRQ - set mask bit */
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- mask = inb(mask_port) | bit;
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- outb(mask, mask_port);
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- return;
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- }
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- pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
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-}
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-
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-static void enable_bigsur_l2irq(unsigned int irq)
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-{
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- unsigned char mask;
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- unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
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- unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
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-
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- if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
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- pr_debug("Enable L2 IRQ %d\n", irq);
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- DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
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- mask_port, bit);
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-
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- /* Enable L2 IRQ - clear mask bit */
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- mask = inb(mask_port) & ~bit;
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- outb(mask, mask_port);
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- return;
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- }
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- pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
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-}
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-
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-static void mask_and_ack_bigsur(unsigned int irq)
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-{
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- pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
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- disable_bigsur_l1irq(irq);
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- else
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- disable_bigsur_l2irq(irq);
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-}
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-
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-static void end_bigsur_irq(unsigned int irq)
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-{
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- pr_debug("end_bigsur_irq IRQ %d\n", irq);
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- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
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- enable_bigsur_l1irq(irq);
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- else
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- enable_bigsur_l2irq(irq);
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- }
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-}
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-
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-static unsigned int startup_bigsur_irq(unsigned int irq)
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-{
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- u8 mask;
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- u32 reg;
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-
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- pr_debug("startup_bigsur_irq IRQ %d\n", irq);
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-
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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- /* Enable the L1 IRQ */
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- enable_bigsur_l1irq(irq);
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- /* Enable all L2 IRQs in this L1 IRQ */
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- mask = ~(bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW]);
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- reg = imr_base - bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW] * imr_offset;
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- mask &= inb(reg);
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- outb(mask,reg);
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- DIPRINTK(2,"startup_bigsur_irq: IMR=0x%08x mask=0x%x\n",reg,inb(reg));
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- }
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- else {
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- /* Enable the L2 IRQ - clear mask bit */
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- enable_bigsur_l2irq(irq);
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- /* Enable the L1 bit masking this L2 IRQ */
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- enable_bigsur_l1irq(bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW]);
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- DIPRINTK(2,"startup_bigsur_irq: L1=%d L2=%d\n",
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- bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW],irq);
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- }
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- return 0;
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-}
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-
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-static void shutdown_bigsur_irq(unsigned int irq)
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-{
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- pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
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- disable_bigsur_l1irq(irq);
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- else
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- disable_bigsur_l2irq(irq);
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-}
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-
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-/* Define the IRQ structures for the L1 and L2 IRQ types */
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-static struct hw_interrupt_type bigsur_l1irq_type = {
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- .typename = "BigSur-CPLD-Level1-IRQ",
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- .startup = startup_bigsur_irq,
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- .shutdown = shutdown_bigsur_irq,
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- .enable = enable_bigsur_l1irq,
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- .disable = disable_bigsur_l1irq,
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- .ack = mask_and_ack_bigsur,
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- .end = end_bigsur_irq
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-};
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-
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-static struct hw_interrupt_type bigsur_l2irq_type = {
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- .typename = "BigSur-CPLD-Level2-IRQ",
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- .startup = startup_bigsur_irq,
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- .shutdown =shutdown_bigsur_irq,
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- .enable = enable_bigsur_l2irq,
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- .disable = disable_bigsur_l2irq,
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- .ack = mask_and_ack_bigsur,
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- .end = end_bigsur_irq
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-};
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-
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-
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-static void make_bigsur_l1isr(unsigned int irq) {
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-
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- /* sanity check first */
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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- /* save the handler in the main description table */
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- irq_desc[irq].chip = &bigsur_l1irq_type;
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- irq_desc[irq].status = IRQ_DISABLED;
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- irq_desc[irq].action = 0;
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- irq_desc[irq].depth = 1;
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-
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- disable_bigsur_l1irq(irq);
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- return;
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- }
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- pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
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- return;
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-}
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-
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-static void make_bigsur_l2isr(unsigned int irq) {
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-
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- /* sanity check first */
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- if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
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- /* save the handler in the main description table */
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- irq_desc[irq].chip = &bigsur_l2irq_type;
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- irq_desc[irq].status = IRQ_DISABLED;
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- irq_desc[irq].action = 0;
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- irq_desc[irq].depth = 1;
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-
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- disable_bigsur_l2irq(irq);
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- return;
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- }
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- pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
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- return;
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-}
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-
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-/* The IRQ's will be decoded as follows:
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- * If a level 2 handler exists and there is an unmasked active
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- * IRQ, the 2nd level handler will be called.
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- * If a level 2 handler does not exist for the active IRQ
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- * the 1st level handler will be called.
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- */
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-
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-int bigsur_irq_demux(int irq)
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-{
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- int dmux_irq = irq;
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- u8 mask, actv_irqs;
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- u32 reg_num;
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-
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- DIPRINTK(3,"bigsur_irq_demux, irq=%d\n", irq);
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- /* decode the 1st level IRQ */
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- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
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- /* Get corresponding L2 ISR bitmask and ISR number */
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- mask = bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW];
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- reg_num = bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW];
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- /* find the active IRQ's (XOR with inactive level)*/
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- actv_irqs = inb(isr_base-reg_num*isr_offset) ^
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- bigsur_l2_inactv_state[reg_num];
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- /* decode active IRQ's */
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- actv_irqs = actv_irqs & mask & ~(inb(imr_base-reg_num*imr_offset));
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- /* if NEZ then we have an active L2 IRQ */
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- if(actv_irqs) dmux_irq = ffz(~actv_irqs) + reg_num*8+BIGSUR_2NDLVL_IRQ_LOW;
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- /* if no 2nd level IRQ action, but has 1st level, use 1st level handler */
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- if(!irq_desc[dmux_irq].action && irq_desc[irq].action)
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- dmux_irq = irq;
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- DIPRINTK(1,"bigsur_irq_demux: irq=%d dmux_irq=%d mask=0x%04x reg=%d\n",
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- irq, dmux_irq, mask, reg_num);
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- }
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-#ifdef CONFIG_HD64465
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- dmux_irq = hd64465_irq_demux(dmux_irq);
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-#endif /* CONFIG_HD64465 */
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- DIPRINTK(3,"bigsur_irq_demux, demux_irq=%d\n", dmux_irq);
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-
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- return dmux_irq;
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-}
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-
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-/*===========================================================*/
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-// Big Sur Init Routines
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-/*===========================================================*/
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-void __init init_bigsur_IRQ(void)
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-{
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- int i;
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-
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- if (!MACH_BIGSUR) return;
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-
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- /* Create ISR's for Big Sur CPLD IRQ's */
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- /*==============================================================*/
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- for(i=BIGSUR_IRQ_LOW;i<BIGSUR_IRQ_HIGH;i++)
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- make_bigsur_l1isr(i);
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-
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- printk(KERN_INFO "Big Sur CPLD L1 interrupts %d to %d.\n",
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- BIGSUR_IRQ_LOW,BIGSUR_IRQ_HIGH);
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-
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- for(i=BIGSUR_2NDLVL_IRQ_LOW;i<BIGSUR_2NDLVL_IRQ_HIGH;i++)
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- make_bigsur_l2isr(i);
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-
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- printk(KERN_INFO "Big Sur CPLD L2 interrupts %d to %d.\n",
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- BIGSUR_2NDLVL_IRQ_LOW,BIGSUR_2NDLVL_IRQ_HIGH);
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-
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-}
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