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@@ -121,6 +121,41 @@ static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc)
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return val;
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}
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+/*
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+ * SYSTIM read access for I210/I211
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+ */
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+
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+static void igb_ptp_read_i210(struct igb_adapter *adapter, struct timespec *ts)
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+{
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+ struct e1000_hw *hw = &adapter->hw;
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+ u32 sec, nsec, jk;
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+
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+ /*
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+ * The timestamp latches on lowest register read. For I210/I211, the
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+ * lowest register is SYSTIMR. Since we only need to provide nanosecond
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+ * resolution, we can ignore it.
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+ */
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+ jk = rd32(E1000_SYSTIMR);
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+ nsec = rd32(E1000_SYSTIML);
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+ sec = rd32(E1000_SYSTIMH);
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+
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+ ts->tv_sec = sec;
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+ ts->tv_nsec = nsec;
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+}
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+
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+static void igb_ptp_write_i210(struct igb_adapter *adapter,
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+ const struct timespec *ts)
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+{
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+ struct e1000_hw *hw = &adapter->hw;
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+
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+ /*
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+ * Writing the SYSTIMR register is not necessary as it only provides
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+ * sub-nanosecond resolution.
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+ */
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+ wr32(E1000_SYSTIML, ts->tv_nsec);
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+ wr32(E1000_SYSTIMH, ts->tv_sec);
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+}
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+
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/**
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* igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
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* @adapter: board private structure
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@@ -146,24 +181,28 @@ static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
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u64 ns;
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switch (adapter->hw.mac.type) {
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+ case e1000_82576:
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+ case e1000_82580:
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+ case e1000_i350:
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+ spin_lock_irqsave(&adapter->tmreg_lock, flags);
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+
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+ ns = timecounter_cyc2time(&adapter->tc, systim);
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+
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+ spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
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+
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+ memset(hwtstamps, 0, sizeof(*hwtstamps));
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+ hwtstamps->hwtstamp = ns_to_ktime(ns);
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+ break;
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case e1000_i210:
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case e1000_i211:
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- case e1000_i350:
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- case e1000_82580:
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- case e1000_82576:
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+ memset(hwtstamps, 0, sizeof(*hwtstamps));
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+ /* Upper 32 bits contain s, lower 32 bits contain ns. */
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+ hwtstamps->hwtstamp = ktime_set(systim >> 32,
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+ systim & 0xFFFFFFFF);
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break;
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default:
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- return;
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+ break;
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}
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-
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- spin_lock_irqsave(&adapter->tmreg_lock, flags);
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-
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- ns = timecounter_cyc2time(&adapter->tc, systim);
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-
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- spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
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-
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- memset(hwtstamps, 0, sizeof(*hwtstamps));
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- hwtstamps->hwtstamp = ns_to_ktime(ns);
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}
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/*
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@@ -225,7 +264,7 @@ static int igb_ptp_adjfreq_82580(struct ptp_clock_info *ptp, s32 ppb)
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return 0;
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}
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-static int igb_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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+static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
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{
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struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
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ptp_caps);
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@@ -243,7 +282,26 @@ static int igb_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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return 0;
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}
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-static int igb_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
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+static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
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+{
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+ struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
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+ ptp_caps);
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+ unsigned long flags;
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+ struct timespec now, then = ns_to_timespec(delta);
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+
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+ spin_lock_irqsave(&igb->tmreg_lock, flags);
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+
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+ igb_ptp_read_i210(igb, &now);
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+ now = timespec_add(now, then);
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+ igb_ptp_write_i210(igb, (const struct timespec *)&now);
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+
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+ spin_unlock_irqrestore(&igb->tmreg_lock, flags);
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+
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+ return 0;
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+}
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+
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+static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
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+ struct timespec *ts)
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{
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struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
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ptp_caps);
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@@ -263,8 +321,24 @@ static int igb_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
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return 0;
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}
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-static int igb_ptp_settime(struct ptp_clock_info *ptp,
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- const struct timespec *ts)
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+static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
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+ struct timespec *ts)
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+{
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+ struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
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+ ptp_caps);
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&igb->tmreg_lock, flags);
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+
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+ igb_ptp_read_i210(igb, ts);
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+
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+ spin_unlock_irqrestore(&igb->tmreg_lock, flags);
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+
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+ return 0;
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+}
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+
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+static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
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+ const struct timespec *ts)
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{
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struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
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ptp_caps);
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@@ -283,6 +357,22 @@ static int igb_ptp_settime(struct ptp_clock_info *ptp,
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return 0;
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}
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+static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
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+ const struct timespec *ts)
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+{
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+ struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
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+ ptp_caps);
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&igb->tmreg_lock, flags);
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+
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+ igb_ptp_write_i210(igb, ts);
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+
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+ spin_unlock_irqrestore(&igb->tmreg_lock, flags);
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+
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+ return 0;
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+}
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+
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static int igb_ptp_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on)
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{
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@@ -320,7 +410,7 @@ static void igb_ptp_overflow_check(struct work_struct *work)
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container_of(work, struct igb_adapter, ptp_overflow_work.work);
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struct timespec ts;
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- igb_ptp_gettime(&igb->ptp_caps, &ts);
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+ igb->ptp_caps.gettime(&igb->ptp_caps, &ts);
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pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
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@@ -506,6 +596,13 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
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if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
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tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
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tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
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+
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+ if ((hw->mac.type == e1000_i210) ||
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+ (hw->mac.type == e1000_i211)) {
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+ regval = rd32(E1000_RXPBS);
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+ regval |= E1000_RXPBS_CFG_TS_EN;
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+ wr32(E1000_RXPBS, regval);
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+ }
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}
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/* enable/disable TX */
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@@ -556,7 +653,9 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
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wrfl();
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/* clear TX/RX time stamp registers, just to be sure */
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+ regval = rd32(E1000_TXSTMPL);
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regval = rd32(E1000_TXSTMPH);
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+ regval = rd32(E1000_RXSTMPL);
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regval = rd32(E1000_RXSTMPH);
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return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
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@@ -569,19 +668,35 @@ void igb_ptp_init(struct igb_adapter *adapter)
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struct net_device *netdev = adapter->netdev;
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switch (hw->mac.type) {
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- case e1000_i210:
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- case e1000_i211:
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- case e1000_i350:
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+ case e1000_82576:
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+ snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
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+ adapter->ptp_caps.owner = THIS_MODULE;
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+ adapter->ptp_caps.max_adj = 1000000000;
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+ adapter->ptp_caps.n_ext_ts = 0;
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+ adapter->ptp_caps.pps = 0;
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+ adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
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+ adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
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+ adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
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+ adapter->ptp_caps.settime = igb_ptp_settime_82576;
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+ adapter->ptp_caps.enable = igb_ptp_enable;
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+ adapter->cc.read = igb_ptp_read_82576;
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+ adapter->cc.mask = CLOCKSOURCE_MASK(64);
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+ adapter->cc.mult = 1;
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+ adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
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+ /* Dial the nominal frequency. */
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+ wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
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+ break;
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case e1000_82580:
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+ case e1000_i350:
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snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
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adapter->ptp_caps.owner = THIS_MODULE;
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adapter->ptp_caps.max_adj = 62499999;
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adapter->ptp_caps.n_ext_ts = 0;
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adapter->ptp_caps.pps = 0;
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adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
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- adapter->ptp_caps.adjtime = igb_ptp_adjtime;
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- adapter->ptp_caps.gettime = igb_ptp_gettime;
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- adapter->ptp_caps.settime = igb_ptp_settime;
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+ adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
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+ adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
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+ adapter->ptp_caps.settime = igb_ptp_settime_82576;
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adapter->ptp_caps.enable = igb_ptp_enable;
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adapter->cc.read = igb_ptp_read_82580;
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adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580);
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@@ -590,23 +705,20 @@ void igb_ptp_init(struct igb_adapter *adapter)
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/* Enable the timer functions by clearing bit 31. */
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wr32(E1000_TSAUXC, 0x0);
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break;
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- case e1000_82576:
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+ case e1000_i210:
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+ case e1000_i211:
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snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
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adapter->ptp_caps.owner = THIS_MODULE;
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- adapter->ptp_caps.max_adj = 1000000000;
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+ adapter->ptp_caps.max_adj = 62499999;
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adapter->ptp_caps.n_ext_ts = 0;
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adapter->ptp_caps.pps = 0;
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- adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
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- adapter->ptp_caps.adjtime = igb_ptp_adjtime;
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- adapter->ptp_caps.gettime = igb_ptp_gettime;
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- adapter->ptp_caps.settime = igb_ptp_settime;
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+ adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
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+ adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
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+ adapter->ptp_caps.gettime = igb_ptp_gettime_i210;
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+ adapter->ptp_caps.settime = igb_ptp_settime_i210;
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adapter->ptp_caps.enable = igb_ptp_enable;
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- adapter->cc.read = igb_ptp_read_82576;
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- adapter->cc.mask = CLOCKSOURCE_MASK(64);
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- adapter->cc.mult = 1;
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- adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
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- /* Dial the nominal frequency. */
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- wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
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+ /* Enable the timer functions by clearing bit 31. */
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+ wr32(E1000_TSAUXC, 0x0);
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break;
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default:
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adapter->ptp_clock = NULL;
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@@ -615,17 +727,24 @@ void igb_ptp_init(struct igb_adapter *adapter)
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wrfl();
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- timecounter_init(&adapter->tc, &adapter->cc,
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- ktime_to_ns(ktime_get_real()));
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+ spin_lock_init(&adapter->tmreg_lock);
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+ INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
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- INIT_DELAYED_WORK(&adapter->ptp_overflow_work, igb_ptp_overflow_check);
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+ /* Initialize the clock and overflow work for devices that need it. */
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+ if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
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+ struct timespec ts = ktime_to_timespec(ktime_get_real());
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- spin_lock_init(&adapter->tmreg_lock);
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+ igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
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+ } else {
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+ timecounter_init(&adapter->tc, &adapter->cc,
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+ ktime_to_ns(ktime_get_real()));
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- INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
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+ INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
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+ igb_ptp_overflow_check);
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- schedule_delayed_work(&adapter->ptp_overflow_work,
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- IGB_SYSTIM_OVERFLOW_PERIOD);
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+ schedule_delayed_work(&adapter->ptp_overflow_work,
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+ IGB_SYSTIM_OVERFLOW_PERIOD);
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+ }
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/* Initialize the time sync interrupts for devices that support it. */
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if (hw->mac.type >= e1000_82580) {
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@@ -708,6 +827,13 @@ void igb_ptp_reset(struct igb_adapter *adapter)
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return;
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}
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- timecounter_init(&adapter->tc, &adapter->cc,
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- ktime_to_ns(ktime_get_real()));
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+ /* Re-initialize the timer. */
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+ if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
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+ struct timespec ts = ktime_to_timespec(ktime_get_real());
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+
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+ igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
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+ } else {
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+ timecounter_init(&adapter->tc, &adapter->cc,
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+ ktime_to_ns(ktime_get_real()));
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+ }
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}
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