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@@ -192,7 +192,8 @@ startup_64:
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movq initial_code(%rip),%rax
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jmp *%rax
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- /* SMP bootup changes these two */
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+ /* SMP bootup changes these two */
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+ .align 8
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.globl initial_code
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initial_code:
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.quad x86_64_start_kernel
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@@ -237,7 +238,7 @@ ENTRY(no_long_mode)
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.org 0xf00
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.globl pGDT32
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pGDT32:
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- .word gdt_end-cpu_gdt_table
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+ .word gdt_end-cpu_gdt_table-1
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.long cpu_gdt_table-__START_KERNEL_map
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.org 0xf10
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@@ -293,8 +294,6 @@ NEXT_PAGE(level2_kernel_pgt)
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/* Module mapping starts here */
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.fill 492,8,0
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-NEXT_PAGE(empty_zero_page)
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-
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NEXT_PAGE(level3_physmem_pgt)
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.quad phys_level2_kernel_pgt | 0x007 /* so that __va works even before pagetable_init */
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.fill 511,8,0
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@@ -337,7 +336,7 @@ ENTRY(boot_level4_pgt)
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.align 16
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.globl cpu_gdt_descr
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cpu_gdt_descr:
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- .word gdt_end-cpu_gdt_table
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+ .word gdt_end-cpu_gdt_table-1
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gdt:
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.quad cpu_gdt_table
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#ifdef CONFIG_SMP
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@@ -352,7 +351,8 @@ gdt:
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* Also sysret mandates a special GDT layout
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*/
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-.align PAGE_SIZE
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+ .section .data.page_aligned, "aw"
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+ .align PAGE_SIZE
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/* The TLS descriptors are currently at a different place compared to i386.
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Hopefully nobody expects them at a fixed place (Wine?) */
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@@ -378,9 +378,12 @@ gdt_end:
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/* zero the remaining page */
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.fill PAGE_SIZE / 8 - GDT_ENTRIES,8,0
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-ENTRY(idt_table)
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- .rept 256
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- .quad 0
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- .quad 0
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- .endr
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+ .section .bss, "aw", @nobits
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+ .align L1_CACHE_BYTES
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+ENTRY(idt_table)
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+ .skip 256 * 16
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+ .section .bss.page_aligned, "aw", @nobits
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+ .align PAGE_SIZE
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+ENTRY(empty_zero_page)
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+ .skip PAGE_SIZE
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