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@@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
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void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
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void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
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#endif
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#endif
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+/* --------------------------------------------------------------------
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+ * Compact Flash (PCMCIA or IDE)
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+ * -------------------------------------------------------------------- */
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+
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+#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
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+ defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
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+
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+static struct at91_cf_data cf0_data;
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+
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+static struct resource cf0_resources[] = {
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+ [0] = {
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+ .start = AT91_CHIPSELECT_4,
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+ .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
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+ .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
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+ }
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+};
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+
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+static struct platform_device cf0_device = {
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &cf0_data,
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+ },
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+ .resource = cf0_resources,
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+ .num_resources = ARRAY_SIZE(cf0_resources),
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+};
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+
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+static struct at91_cf_data cf1_data;
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+
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+static struct resource cf1_resources[] = {
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+ [0] = {
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+ .start = AT91_CHIPSELECT_5,
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+ .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
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+ .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
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+ }
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+};
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+
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+static struct platform_device cf1_device = {
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+ .id = 1,
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+ .dev = {
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+ .platform_data = &cf1_data,
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+ },
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+ .resource = cf1_resources,
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+ .num_resources = ARRAY_SIZE(cf1_resources),
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+};
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+
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+void __init at91_add_device_cf(struct at91_cf_data *data)
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+{
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+ unsigned long ebi0_csa;
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+ struct platform_device *pdev;
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+
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+ if (!data)
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+ return;
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+
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+ /*
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+ * assign CS4 or CS5 to SMC with Compact Flash logic support,
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+ * we assume SMC timings are configured by board code,
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+ * except True IDE where timings are controlled by driver
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+ */
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+ ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
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+ switch (data->chipselect) {
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+ case 4:
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+ at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
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+ ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
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+ cf0_data = *data;
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+ pdev = &cf0_device;
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+ break;
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+ case 5:
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+ at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
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+ ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
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+ cf1_data = *data;
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+ pdev = &cf1_device;
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+ break;
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+ default:
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+ printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
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+ data->chipselect);
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+ return;
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+ }
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+ at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
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+
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+ if (data->det_pin) {
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+ at91_set_gpio_input(data->det_pin, 1);
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+ at91_set_deglitch(data->det_pin, 1);
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+ }
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+
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+ if (data->irq_pin) {
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+ at91_set_gpio_input(data->irq_pin, 1);
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+ at91_set_deglitch(data->irq_pin, 1);
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+ }
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+
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+ if (data->vcc_pin)
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+ /* initially off */
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+ at91_set_gpio_output(data->vcc_pin, 0);
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+
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+ /* enable EBI controlled pins */
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+ at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
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+ at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
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+ at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
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+ at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
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+
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+ pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
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+ platform_device_register(pdev);
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+}
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+#else
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+void __init at91_add_device_cf(struct at91_cf_data *data) {}
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+#endif
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/* --------------------------------------------------------------------
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/* --------------------------------------------------------------------
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* NAND / SmartMedia
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* NAND / SmartMedia
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