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@@ -165,7 +165,7 @@ static void mvebu_pcie_set_local_dev_nr(struct mvebu_pcie_port *port, int nr)
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* BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks
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* WIN[0-3] -> DRAM bank[0-3]
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*/
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-static void __init mvebu_pcie_setup_wins(struct mvebu_pcie_port *port)
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+static void mvebu_pcie_setup_wins(struct mvebu_pcie_port *port)
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{
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const struct mbus_dram_target_info *dram;
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u32 size;
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@@ -217,7 +217,7 @@ static void __init mvebu_pcie_setup_wins(struct mvebu_pcie_port *port)
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port->base + PCIE_BAR_CTRL_OFF(1));
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}
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-static void __init mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
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+static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
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{
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u16 cmd;
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u32 mask;
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@@ -628,7 +628,7 @@ static struct pci_ops mvebu_pcie_ops = {
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.write = mvebu_pcie_wr_conf,
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};
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-static int __init mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
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+static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
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{
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struct mvebu_pcie *pcie = sys_to_pcie(sys);
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int i;
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@@ -647,7 +647,7 @@ static int __init mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
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return 1;
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}
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-static int __init mvebu_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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+static int mvebu_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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struct of_irq oirq;
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int ret;
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@@ -704,7 +704,7 @@ resource_size_t mvebu_pcie_align_resource(struct pci_dev *dev,
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return start;
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}
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-static void __init mvebu_pcie_enable(struct mvebu_pcie *pcie)
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+static void mvebu_pcie_enable(struct mvebu_pcie *pcie)
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{
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struct hw_pci hw;
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@@ -727,10 +727,8 @@ static void __init mvebu_pcie_enable(struct mvebu_pcie *pcie)
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* <...> property for one that matches the given port/lane. Once
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* found, maps it.
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*/
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-static void __iomem * __init
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-mvebu_pcie_map_registers(struct platform_device *pdev,
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- struct device_node *np,
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- struct mvebu_pcie_port *port)
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+static void __iomem *mvebu_pcie_map_registers(struct platform_device *pdev,
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+ struct device_node *np, struct mvebu_pcie_port *port)
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{
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struct resource regs;
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int ret = 0;
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@@ -786,7 +784,7 @@ static int mvebu_get_tgt_attr(struct device_node *np, int devfn,
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return -ENOENT;
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}
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-static void __init mvebu_pcie_msi_enable(struct mvebu_pcie *pcie)
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+static void mvebu_pcie_msi_enable(struct mvebu_pcie *pcie)
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{
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struct device_node *msi_node;
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@@ -801,7 +799,7 @@ static void __init mvebu_pcie_msi_enable(struct mvebu_pcie *pcie)
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pcie->msi->dev = &pcie->pdev->dev;
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}
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-static int __init mvebu_pcie_probe(struct platform_device *pdev)
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+static int mvebu_pcie_probe(struct platform_device *pdev)
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{
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struct mvebu_pcie *pcie;
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struct device_node *np = pdev->dev.of_node;
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@@ -814,6 +812,7 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev)
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return -ENOMEM;
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pcie->pdev = pdev;
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+ platform_set_drvdata(pdev, pcie);
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/* Get the PCIe memory and I/O aperture */
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mvebu_mbus_get_pcie_mem_aperture(&pcie->mem);
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@@ -957,16 +956,12 @@ static struct platform_driver mvebu_pcie_driver = {
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.name = "mvebu-pcie",
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.of_match_table =
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of_match_ptr(mvebu_pcie_of_match_table),
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+ /* driver unloading/unbinding currently not supported */
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+ .suppress_bind_attrs = true,
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},
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+ .probe = mvebu_pcie_probe,
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};
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-
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-static int __init mvebu_pcie_init(void)
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-{
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- return platform_driver_probe(&mvebu_pcie_driver,
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- mvebu_pcie_probe);
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-}
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-
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-subsys_initcall(mvebu_pcie_init);
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+module_platform_driver(mvebu_pcie_driver);
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MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
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MODULE_DESCRIPTION("Marvell EBU PCIe driver");
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