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@@ -41,7 +41,7 @@ void __init imx_scu_map_io(void)
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scu_base = IMX_IO_ADDRESS(base);
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}
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-void __cpuinit platform_secondary_init(unsigned int cpu)
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+static void __cpuinit imx_secondary_init(unsigned int cpu)
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{
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/*
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* if any interrupts are already enabled for the primary
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@@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
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gic_secondary_init(0);
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}
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-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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+static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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imx_set_cpu_jump(cpu, v7_secondary_startup);
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imx_enable_cpu(cpu, true);
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@@ -62,7 +62,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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-void __init smp_init_cpus(void)
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+static void __init imx_smp_init_cpus(void)
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{
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int i, ncores;
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@@ -79,7 +79,17 @@ void imx_smp_prepare(void)
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scu_enable(scu_base);
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}
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-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
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+static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
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{
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imx_smp_prepare();
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}
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+
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+struct smp_operations imx_smp_ops __initdata = {
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+ .smp_init_cpus = imx_smp_init_cpus,
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+ .smp_prepare_cpus = imx_smp_prepare_cpus,
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+ .smp_secondary_init = imx_secondary_init,
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+ .smp_boot_secondary = imx_boot_secondary,
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+#ifdef CONFIG_HOTPLUG_CPU
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+ .cpu_die = imx_cpu_die,
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+#endif
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+};
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