|
@@ -323,18 +323,13 @@ static void omap2_mcspi_tx_dma(struct spi_device *spi,
|
|
|
struct omap2_mcspi *mcspi;
|
|
|
struct omap2_mcspi_dma *mcspi_dma;
|
|
|
unsigned int count;
|
|
|
- u8 * rx;
|
|
|
const u8 * tx;
|
|
|
- void __iomem *chstat_reg;
|
|
|
- struct omap2_mcspi_cs *cs = spi->controller_state;
|
|
|
|
|
|
mcspi = spi_master_get_devdata(spi->master);
|
|
|
mcspi_dma = &mcspi->dma_channels[spi->chip_select];
|
|
|
count = xfer->len;
|
|
|
|
|
|
- rx = xfer->rx_buf;
|
|
|
tx = xfer->tx_buf;
|
|
|
- chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
|
|
|
|
|
|
if (mcspi_dma->dma_tx) {
|
|
|
struct dma_async_tx_descriptor *tx;
|
|
@@ -359,19 +354,6 @@ static void omap2_mcspi_tx_dma(struct spi_device *spi,
|
|
|
dma_async_issue_pending(mcspi_dma->dma_tx);
|
|
|
omap2_mcspi_set_dma_req(spi, 0, 1);
|
|
|
|
|
|
- wait_for_completion(&mcspi_dma->dma_tx_completion);
|
|
|
- dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
|
|
|
- DMA_TO_DEVICE);
|
|
|
-
|
|
|
- /* for TX_ONLY mode, be sure all words have shifted out */
|
|
|
- if (rx == NULL) {
|
|
|
- if (mcspi_wait_for_reg_bit(chstat_reg,
|
|
|
- OMAP2_MCSPI_CHSTAT_TXS) < 0)
|
|
|
- dev_err(&spi->dev, "TXS timed out\n");
|
|
|
- else if (mcspi_wait_for_reg_bit(chstat_reg,
|
|
|
- OMAP2_MCSPI_CHSTAT_EOT) < 0)
|
|
|
- dev_err(&spi->dev, "EOT timed out\n");
|
|
|
- }
|
|
|
}
|
|
|
|
|
|
static unsigned
|
|
@@ -492,6 +474,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
|
|
|
struct dma_slave_config cfg;
|
|
|
enum dma_slave_buswidth width;
|
|
|
unsigned es;
|
|
|
+ void __iomem *chstat_reg;
|
|
|
|
|
|
mcspi = spi_master_get_devdata(spi->master);
|
|
|
mcspi_dma = &mcspi->dma_channels[spi->chip_select];
|
|
@@ -526,8 +509,24 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
|
|
|
omap2_mcspi_tx_dma(spi, xfer, cfg);
|
|
|
|
|
|
if (rx != NULL)
|
|
|
- return omap2_mcspi_rx_dma(spi, xfer, cfg, es);
|
|
|
-
|
|
|
+ count = omap2_mcspi_rx_dma(spi, xfer, cfg, es);
|
|
|
+
|
|
|
+ if (tx != NULL) {
|
|
|
+ chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
|
|
|
+ wait_for_completion(&mcspi_dma->dma_tx_completion);
|
|
|
+ dma_unmap_single(mcspi->dev, xfer->tx_dma, xfer->len,
|
|
|
+ DMA_TO_DEVICE);
|
|
|
+
|
|
|
+ /* for TX_ONLY mode, be sure all words have shifted out */
|
|
|
+ if (rx == NULL) {
|
|
|
+ if (mcspi_wait_for_reg_bit(chstat_reg,
|
|
|
+ OMAP2_MCSPI_CHSTAT_TXS) < 0)
|
|
|
+ dev_err(&spi->dev, "TXS timed out\n");
|
|
|
+ else if (mcspi_wait_for_reg_bit(chstat_reg,
|
|
|
+ OMAP2_MCSPI_CHSTAT_EOT) < 0)
|
|
|
+ dev_err(&spi->dev, "EOT timed out\n");
|
|
|
+ }
|
|
|
+ }
|
|
|
return count;
|
|
|
}
|
|
|
|