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@@ -0,0 +1,511 @@
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+/*
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+ * Xen event channels
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+ *
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+ * Xen models interrupts with abstract event channels. Because each
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+ * domain gets 1024 event channels, but NR_IRQ is not that large, we
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+ * must dynamically map irqs<->event channels. The event channels
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+ * interface with the rest of the kernel by defining a xen interrupt
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+ * chip. When an event is recieved, it is mapped to an irq and sent
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+ * through the normal interrupt processing path.
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+ *
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+ * There are four kinds of events which can be mapped to an event
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+ * channel:
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+ *
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+ * 1. Inter-domain notifications. This includes all the virtual
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+ * device events, since they're driven by front-ends in another domain
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+ * (typically dom0).
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+ * 2. VIRQs, typically used for timers. These are per-cpu events.
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+ * 3. IPIs.
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+ * 4. Hardware interrupts. Not supported at present.
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+ *
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+ * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
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+ */
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+
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+#include <linux/linkage.h>
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+#include <linux/interrupt.h>
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+#include <linux/irq.h>
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+#include <linux/module.h>
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+#include <linux/string.h>
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+
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+#include <asm/ptrace.h>
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+#include <asm/irq.h>
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+#include <asm/sync_bitops.h>
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+#include <asm/xen/hypercall.h>
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+
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+#include <xen/events.h>
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+#include <xen/interface/xen.h>
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+#include <xen/interface/event_channel.h>
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+
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+#include "xen-ops.h"
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+
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+/*
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+ * This lock protects updates to the following mapping and reference-count
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+ * arrays. The lock does not need to be acquired to read the mapping tables.
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+ */
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+static DEFINE_SPINLOCK(irq_mapping_update_lock);
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+
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+/* IRQ <-> VIRQ mapping. */
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+static DEFINE_PER_CPU(int, virq_to_irq[NR_VIRQS]) = {[0 ... NR_VIRQS-1] = -1};
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+
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+/* Packed IRQ information: binding type, sub-type index, and event channel. */
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+struct packed_irq
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+{
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+ unsigned short evtchn;
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+ unsigned char index;
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+ unsigned char type;
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+};
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+
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+static struct packed_irq irq_info[NR_IRQS];
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+
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+/* Binding types. */
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+enum { IRQT_UNBOUND, IRQT_PIRQ, IRQT_VIRQ, IRQT_IPI, IRQT_EVTCHN };
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+
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+/* Convenient shorthand for packed representation of an unbound IRQ. */
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+#define IRQ_UNBOUND mk_irq_info(IRQT_UNBOUND, 0, 0)
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+
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+static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
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+ [0 ... NR_EVENT_CHANNELS-1] = -1
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+};
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+static unsigned long cpu_evtchn_mask[NR_CPUS][NR_EVENT_CHANNELS/BITS_PER_LONG];
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+static u8 cpu_evtchn[NR_EVENT_CHANNELS];
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+
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+/* Reference counts for bindings to IRQs. */
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+static int irq_bindcount[NR_IRQS];
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+
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+/* Xen will never allocate port zero for any purpose. */
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+#define VALID_EVTCHN(chn) ((chn) != 0)
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+
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+/*
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+ * Force a proper event-channel callback from Xen after clearing the
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+ * callback mask. We do this in a very simple manner, by making a call
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+ * down into Xen. The pending flag will be checked by Xen on return.
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+ */
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+void force_evtchn_callback(void)
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+{
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+ (void)HYPERVISOR_xen_version(0, NULL);
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+}
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+EXPORT_SYMBOL_GPL(force_evtchn_callback);
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+
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+static struct irq_chip xen_dynamic_chip;
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+
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+/* Constructor for packed IRQ information. */
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+static inline struct packed_irq mk_irq_info(u32 type, u32 index, u32 evtchn)
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+{
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+ return (struct packed_irq) { evtchn, index, type };
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+}
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+
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+/*
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+ * Accessors for packed IRQ information.
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+ */
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+static inline unsigned int evtchn_from_irq(int irq)
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+{
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+ return irq_info[irq].evtchn;
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+}
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+
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+static inline unsigned int index_from_irq(int irq)
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+{
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+ return irq_info[irq].index;
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+}
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+
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+static inline unsigned int type_from_irq(int irq)
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+{
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+ return irq_info[irq].type;
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+}
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+
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+static inline unsigned long active_evtchns(unsigned int cpu,
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+ struct shared_info *sh,
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+ unsigned int idx)
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+{
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+ return (sh->evtchn_pending[idx] &
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+ cpu_evtchn_mask[cpu][idx] &
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+ ~sh->evtchn_mask[idx]);
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+}
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+
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+static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
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+{
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+ int irq = evtchn_to_irq[chn];
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+
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+ BUG_ON(irq == -1);
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+#ifdef CONFIG_SMP
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+ irq_desc[irq].affinity = cpumask_of_cpu(cpu);
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+#endif
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+
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+ __clear_bit(chn, cpu_evtchn_mask[cpu_evtchn[chn]]);
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+ __set_bit(chn, cpu_evtchn_mask[cpu]);
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+
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+ cpu_evtchn[chn] = cpu;
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+}
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+
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+static void init_evtchn_cpu_bindings(void)
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+{
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+#ifdef CONFIG_SMP
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+ int i;
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+ /* By default all event channels notify CPU#0. */
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+ for (i = 0; i < NR_IRQS; i++)
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+ irq_desc[i].affinity = cpumask_of_cpu(0);
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+#endif
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+
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+ memset(cpu_evtchn, 0, sizeof(cpu_evtchn));
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+ memset(cpu_evtchn_mask[0], ~0, sizeof(cpu_evtchn_mask[0]));
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+}
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+
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+static inline unsigned int cpu_from_evtchn(unsigned int evtchn)
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+{
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+ return cpu_evtchn[evtchn];
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+}
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+
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+static inline void clear_evtchn(int port)
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+{
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+ struct shared_info *s = HYPERVISOR_shared_info;
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+ sync_clear_bit(port, &s->evtchn_pending[0]);
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+}
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+
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+static inline void set_evtchn(int port)
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+{
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+ struct shared_info *s = HYPERVISOR_shared_info;
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+ sync_set_bit(port, &s->evtchn_pending[0]);
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+}
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+
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+
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+/**
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+ * notify_remote_via_irq - send event to remote end of event channel via irq
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+ * @irq: irq of event channel to send event to
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+ *
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+ * Unlike notify_remote_via_evtchn(), this is safe to use across
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+ * save/restore. Notifications on a broken connection are silently
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+ * dropped.
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+ */
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+void notify_remote_via_irq(int irq)
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+{
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+ int evtchn = evtchn_from_irq(irq);
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+
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+ if (VALID_EVTCHN(evtchn))
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+ notify_remote_via_evtchn(evtchn);
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+}
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+EXPORT_SYMBOL_GPL(notify_remote_via_irq);
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+
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+static void mask_evtchn(int port)
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+{
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+ struct shared_info *s = HYPERVISOR_shared_info;
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+ sync_set_bit(port, &s->evtchn_mask[0]);
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+}
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+
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+static void unmask_evtchn(int port)
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+{
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+ struct shared_info *s = HYPERVISOR_shared_info;
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+ unsigned int cpu = get_cpu();
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+
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+ BUG_ON(!irqs_disabled());
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+
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+ /* Slow path (hypercall) if this is a non-local port. */
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+ if (unlikely(cpu != cpu_from_evtchn(port))) {
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+ struct evtchn_unmask unmask = { .port = port };
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+ (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
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+ } else {
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+ struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
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+
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+ sync_clear_bit(port, &s->evtchn_mask[0]);
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+
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+ /*
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+ * The following is basically the equivalent of
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+ * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
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+ * the interrupt edge' if the channel is masked.
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+ */
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+ if (sync_test_bit(port, &s->evtchn_pending[0]) &&
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+ !sync_test_and_set_bit(port / BITS_PER_LONG,
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+ &vcpu_info->evtchn_pending_sel))
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+ vcpu_info->evtchn_upcall_pending = 1;
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+ }
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+
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+ put_cpu();
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+}
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+
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+static int find_unbound_irq(void)
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+{
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+ int irq;
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+
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+ /* Only allocate from dynirq range */
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+ for (irq = 0; irq < NR_IRQS; irq++)
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+ if (irq_bindcount[irq] == 0)
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+ break;
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+
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+ if (irq == NR_IRQS)
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+ panic("No available IRQ to bind to: increase NR_IRQS!\n");
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+
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+ return irq;
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+}
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+
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+static int bind_evtchn_to_irq(unsigned int evtchn)
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+{
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+ int irq;
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+
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+ spin_lock(&irq_mapping_update_lock);
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+
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+ irq = evtchn_to_irq[evtchn];
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+
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+ if (irq == -1) {
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+ irq = find_unbound_irq();
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+
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+ dynamic_irq_init(irq);
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+ set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
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+ handle_level_irq, "event");
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+
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+ evtchn_to_irq[evtchn] = irq;
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+ irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
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+ }
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+
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+ irq_bindcount[irq]++;
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+
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+ spin_unlock(&irq_mapping_update_lock);
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+
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+ return irq;
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+}
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+
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+static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
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+{
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+ struct evtchn_bind_virq bind_virq;
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+ int evtchn, irq;
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+
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+ spin_lock(&irq_mapping_update_lock);
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+
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+ irq = per_cpu(virq_to_irq, cpu)[virq];
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+
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+ if (irq == -1) {
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+ bind_virq.virq = virq;
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+ bind_virq.vcpu = cpu;
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+ if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
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+ &bind_virq) != 0)
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+ BUG();
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+ evtchn = bind_virq.port;
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+
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+ irq = find_unbound_irq();
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+
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+ dynamic_irq_init(irq);
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+ set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
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+ handle_level_irq, "virq");
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+
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+ evtchn_to_irq[evtchn] = irq;
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+ irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
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+
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+ per_cpu(virq_to_irq, cpu)[virq] = irq;
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+
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+ bind_evtchn_to_cpu(evtchn, cpu);
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+ }
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+
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+ irq_bindcount[irq]++;
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+
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+ spin_unlock(&irq_mapping_update_lock);
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+
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+ return irq;
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+}
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+
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+static void unbind_from_irq(unsigned int irq)
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+{
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+ struct evtchn_close close;
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+ int evtchn = evtchn_from_irq(irq);
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+
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+ spin_lock(&irq_mapping_update_lock);
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+
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+ if (VALID_EVTCHN(evtchn) && (--irq_bindcount[irq] == 0)) {
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+ close.port = evtchn;
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+ if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
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+ BUG();
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+
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+ switch (type_from_irq(irq)) {
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+ case IRQT_VIRQ:
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+ per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
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+ [index_from_irq(irq)] = -1;
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+ break;
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+ default:
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+ break;
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+ }
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+
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+ /* Closed ports are implicitly re-bound to VCPU0. */
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+ bind_evtchn_to_cpu(evtchn, 0);
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+
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+ evtchn_to_irq[evtchn] = -1;
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+ irq_info[irq] = IRQ_UNBOUND;
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+
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+ dynamic_irq_init(irq);
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+ }
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+
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+ spin_unlock(&irq_mapping_update_lock);
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+}
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+
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+int bind_evtchn_to_irqhandler(unsigned int evtchn,
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+ irqreturn_t (*handler)(int, void *),
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+ unsigned long irqflags,
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+ const char *devname, void *dev_id)
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+{
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+ unsigned int irq;
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+ int retval;
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+
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+ irq = bind_evtchn_to_irq(evtchn);
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+ retval = request_irq(irq, handler, irqflags, devname, dev_id);
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+ if (retval != 0) {
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+ unbind_from_irq(irq);
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+ return retval;
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+ }
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+
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+ return irq;
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+}
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+EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
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+
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+int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
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|
+ irqreturn_t (*handler)(int, void *),
|
|
|
|
+ unsigned long irqflags, const char *devname, void *dev_id)
|
|
|
|
+{
|
|
|
|
+ unsigned int irq;
|
|
|
|
+ int retval;
|
|
|
|
+
|
|
|
|
+ irq = bind_virq_to_irq(virq, cpu);
|
|
|
|
+ retval = request_irq(irq, handler, irqflags, devname, dev_id);
|
|
|
|
+ if (retval != 0) {
|
|
|
|
+ unbind_from_irq(irq);
|
|
|
|
+ return retval;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return irq;
|
|
|
|
+}
|
|
|
|
+EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
|
|
|
|
+
|
|
|
|
+void unbind_from_irqhandler(unsigned int irq, void *dev_id)
|
|
|
|
+{
|
|
|
|
+ free_irq(irq, dev_id);
|
|
|
|
+ unbind_from_irq(irq);
|
|
|
|
+}
|
|
|
|
+EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
|
|
|
|
+
|
|
|
|
+/*
|
|
|
|
+ * Search the CPUs pending events bitmasks. For each one found, map
|
|
|
|
+ * the event number to an irq, and feed it into do_IRQ() for
|
|
|
|
+ * handling.
|
|
|
|
+ *
|
|
|
|
+ * Xen uses a two-level bitmap to speed searching. The first level is
|
|
|
|
+ * a bitset of words which contain pending event bits. The second
|
|
|
|
+ * level is a bitset of pending events themselves.
|
|
|
|
+ */
|
|
|
|
+fastcall void xen_evtchn_do_upcall(struct pt_regs *regs)
|
|
|
|
+{
|
|
|
|
+ int cpu = get_cpu();
|
|
|
|
+ struct shared_info *s = HYPERVISOR_shared_info;
|
|
|
|
+ struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
|
|
|
|
+ unsigned long pending_words;
|
|
|
|
+
|
|
|
|
+ vcpu_info->evtchn_upcall_pending = 0;
|
|
|
|
+
|
|
|
|
+ /* NB. No need for a barrier here -- XCHG is a barrier on x86. */
|
|
|
|
+ pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
|
|
|
|
+ while (pending_words != 0) {
|
|
|
|
+ unsigned long pending_bits;
|
|
|
|
+ int word_idx = __ffs(pending_words);
|
|
|
|
+ pending_words &= ~(1UL << word_idx);
|
|
|
|
+
|
|
|
|
+ while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
|
|
|
|
+ int bit_idx = __ffs(pending_bits);
|
|
|
|
+ int port = (word_idx * BITS_PER_LONG) + bit_idx;
|
|
|
|
+ int irq = evtchn_to_irq[port];
|
|
|
|
+
|
|
|
|
+ if (irq != -1) {
|
|
|
|
+ regs->orig_eax = ~irq;
|
|
|
|
+ do_IRQ(regs);
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ put_cpu();
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+/* Rebind an evtchn so that it gets delivered to a specific cpu */
|
|
|
|
+static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
|
|
|
|
+{
|
|
|
|
+ struct evtchn_bind_vcpu bind_vcpu;
|
|
|
|
+ int evtchn = evtchn_from_irq(irq);
|
|
|
|
+
|
|
|
|
+ if (!VALID_EVTCHN(evtchn))
|
|
|
|
+ return;
|
|
|
|
+
|
|
|
|
+ /* Send future instances of this interrupt to other vcpu. */
|
|
|
|
+ bind_vcpu.port = evtchn;
|
|
|
|
+ bind_vcpu.vcpu = tcpu;
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * If this fails, it usually just indicates that we're dealing with a
|
|
|
|
+ * virq or IPI channel, which don't actually need to be rebound. Ignore
|
|
|
|
+ * it, but don't do the xenlinux-level rebind in that case.
|
|
|
|
+ */
|
|
|
|
+ if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
|
|
|
|
+ bind_evtchn_to_cpu(evtchn, tcpu);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+static void set_affinity_irq(unsigned irq, cpumask_t dest)
|
|
|
|
+{
|
|
|
|
+ unsigned tcpu = first_cpu(dest);
|
|
|
|
+ rebind_irq_to_cpu(irq, tcpu);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void enable_dynirq(unsigned int irq)
|
|
|
|
+{
|
|
|
|
+ int evtchn = evtchn_from_irq(irq);
|
|
|
|
+
|
|
|
|
+ if (VALID_EVTCHN(evtchn))
|
|
|
|
+ unmask_evtchn(evtchn);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void disable_dynirq(unsigned int irq)
|
|
|
|
+{
|
|
|
|
+ int evtchn = evtchn_from_irq(irq);
|
|
|
|
+
|
|
|
|
+ if (VALID_EVTCHN(evtchn))
|
|
|
|
+ mask_evtchn(evtchn);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void ack_dynirq(unsigned int irq)
|
|
|
|
+{
|
|
|
|
+ int evtchn = evtchn_from_irq(irq);
|
|
|
|
+
|
|
|
|
+ move_native_irq(irq);
|
|
|
|
+
|
|
|
|
+ if (VALID_EVTCHN(evtchn))
|
|
|
|
+ clear_evtchn(evtchn);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int retrigger_dynirq(unsigned int irq)
|
|
|
|
+{
|
|
|
|
+ int evtchn = evtchn_from_irq(irq);
|
|
|
|
+ int ret = 0;
|
|
|
|
+
|
|
|
|
+ if (VALID_EVTCHN(evtchn)) {
|
|
|
|
+ set_evtchn(evtchn);
|
|
|
|
+ ret = 1;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return ret;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static struct irq_chip xen_dynamic_chip __read_mostly = {
|
|
|
|
+ .name = "xen-dyn",
|
|
|
|
+ .mask = disable_dynirq,
|
|
|
|
+ .unmask = enable_dynirq,
|
|
|
|
+ .ack = ack_dynirq,
|
|
|
|
+ .set_affinity = set_affinity_irq,
|
|
|
|
+ .retrigger = retrigger_dynirq,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+void __init xen_init_IRQ(void)
|
|
|
|
+{
|
|
|
|
+ int i;
|
|
|
|
+
|
|
|
|
+ init_evtchn_cpu_bindings();
|
|
|
|
+
|
|
|
|
+ /* No event channels are 'live' right now. */
|
|
|
|
+ for (i = 0; i < NR_EVENT_CHANNELS; i++)
|
|
|
|
+ mask_evtchn(i);
|
|
|
|
+
|
|
|
|
+ /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
|
|
|
|
+ for (i = 0; i < NR_IRQS; i++)
|
|
|
|
+ irq_bindcount[i] = 0;
|
|
|
|
+
|
|
|
|
+ irq_ctx_init(smp_processor_id());
|
|
|
|
+}
|