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@@ -191,17 +191,12 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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int i;
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LIST_HEAD(tmp_list);
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- /*
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- * In-use bit automatically set by reading chanctrl
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- * If 0, we got it, if 1, someone else did
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- */
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- chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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- if (chanctrl & IOAT_CHANCTRL_CHANNEL_IN_USE)
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- return -EBUSY;
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+ /* have we already been set up? */
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+ if (!list_empty(&ioat_chan->free_desc))
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+ return INITIAL_IOAT_DESC_COUNT;
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/* Setup register to interrupt and write completion status on error */
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- chanctrl = IOAT_CHANCTRL_CHANNEL_IN_USE |
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- IOAT_CHANCTRL_ERR_INT_EN |
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+ chanctrl = IOAT_CHANCTRL_ERR_INT_EN |
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IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
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IOAT_CHANCTRL_ERR_COMPLETION_EN;
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writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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@@ -282,11 +277,6 @@ static void ioat_dma_free_chan_resources(struct dma_chan *chan)
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in_use_descs - 1);
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ioat_chan->last_completion = ioat_chan->completion_addr = 0;
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-
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- /* Tell hw the chan is free */
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- chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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- chanctrl &= ~IOAT_CHANCTRL_CHANNEL_IN_USE;
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- writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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}
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static struct dma_async_tx_descriptor *
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