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@@ -44,6 +44,11 @@
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#define DA8XX_EMAC_RAM_OFFSET 0x0000
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#define DA8XX_EMAC_RAM_OFFSET 0x0000
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#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
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#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
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+#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
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+#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
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+#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
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+#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
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+
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void __iomem *da8xx_syscfg0_base;
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void __iomem *da8xx_syscfg0_base;
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void __iomem *da8xx_syscfg1_base;
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void __iomem *da8xx_syscfg1_base;
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@@ -566,13 +571,13 @@ static struct resource da8xx_mmcsd0_resources[] = {
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.flags = IORESOURCE_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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},
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{ /* DMA RX */
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{ /* DMA RX */
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- .start = EDMA_CTLR_CHAN(0, 16),
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- .end = EDMA_CTLR_CHAN(0, 16),
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+ .start = DA8XX_DMA_MMCSD0_RX,
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+ .end = DA8XX_DMA_MMCSD0_RX,
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.flags = IORESOURCE_DMA,
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.flags = IORESOURCE_DMA,
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},
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},
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{ /* DMA TX */
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{ /* DMA TX */
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- .start = EDMA_CTLR_CHAN(0, 17),
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- .end = EDMA_CTLR_CHAN(0, 17),
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+ .start = DA8XX_DMA_MMCSD0_TX,
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+ .end = DA8XX_DMA_MMCSD0_TX,
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.flags = IORESOURCE_DMA,
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.flags = IORESOURCE_DMA,
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},
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},
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};
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};
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@@ -603,13 +608,13 @@ static struct resource da850_mmcsd1_resources[] = {
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.flags = IORESOURCE_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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},
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{ /* DMA RX */
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{ /* DMA RX */
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- .start = EDMA_CTLR_CHAN(1, 28),
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- .end = EDMA_CTLR_CHAN(1, 28),
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+ .start = DA850_DMA_MMCSD1_RX,
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+ .end = DA850_DMA_MMCSD1_RX,
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.flags = IORESOURCE_DMA,
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.flags = IORESOURCE_DMA,
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},
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},
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{ /* DMA TX */
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{ /* DMA TX */
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- .start = EDMA_CTLR_CHAN(1, 29),
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- .end = EDMA_CTLR_CHAN(1, 29),
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+ .start = DA850_DMA_MMCSD1_TX,
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+ .end = DA850_DMA_MMCSD1_TX,
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.flags = IORESOURCE_DMA,
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.flags = IORESOURCE_DMA,
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},
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},
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};
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};
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