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@@ -32,7 +32,6 @@
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include "ioatdma.h"
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-#include "ioatdma_io.h"
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#include "ioatdma_registers.h"
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#include "ioatdma_hw.h"
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@@ -51,8 +50,8 @@ static int enumerate_dma_channels(struct ioat_device *device)
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int i;
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struct ioat_dma_chan *ioat_chan;
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- device->common.chancnt = ioatdma_read8(device, IOAT_CHANCNT_OFFSET);
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- xfercap_scale = ioatdma_read8(device, IOAT_XFERCAP_OFFSET);
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+ device->common.chancnt = readb(device->reg_base + IOAT_CHANCNT_OFFSET);
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+ xfercap_scale = readb(device->reg_base + IOAT_XFERCAP_OFFSET);
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xfercap = (xfercap_scale == 0 ? -1 : (1UL << xfercap_scale));
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for (i = 0; i < device->common.chancnt; i++) {
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@@ -123,7 +122,7 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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* In-use bit automatically set by reading chanctrl
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* If 0, we got it, if 1, someone else did
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*/
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- chanctrl = ioatdma_chan_read16(ioat_chan, IOAT_CHANCTRL_OFFSET);
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+ chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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if (chanctrl & IOAT_CHANCTRL_CHANNEL_IN_USE)
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return -EBUSY;
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@@ -132,12 +131,12 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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IOAT_CHANCTRL_ERR_INT_EN |
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IOAT_CHANCTRL_ANY_ERR_ABORT_EN |
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IOAT_CHANCTRL_ERR_COMPLETION_EN;
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- ioatdma_chan_write16(ioat_chan, IOAT_CHANCTRL_OFFSET, chanctrl);
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+ writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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- chanerr = ioatdma_chan_read32(ioat_chan, IOAT_CHANERR_OFFSET);
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+ chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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if (chanerr) {
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printk("IOAT: CHANERR = %x, clearing\n", chanerr);
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- ioatdma_chan_write32(ioat_chan, IOAT_CHANERR_OFFSET, chanerr);
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+ writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
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}
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/* Allocate descriptors */
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@@ -161,10 +160,10 @@ static int ioat_dma_alloc_chan_resources(struct dma_chan *chan)
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&ioat_chan->completion_addr);
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memset(ioat_chan->completion_virt, 0,
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sizeof(*ioat_chan->completion_virt));
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- ioatdma_chan_write32(ioat_chan, IOAT_CHANCMP_OFFSET_LOW,
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- ((u64) ioat_chan->completion_addr) & 0x00000000FFFFFFFF);
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- ioatdma_chan_write32(ioat_chan, IOAT_CHANCMP_OFFSET_HIGH,
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- ((u64) ioat_chan->completion_addr) >> 32);
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+ writel(((u64) ioat_chan->completion_addr) & 0x00000000FFFFFFFF,
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+ ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);
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+ writel(((u64) ioat_chan->completion_addr) >> 32,
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+ ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
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ioat_start_null_desc(ioat_chan);
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return i;
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@@ -182,7 +181,7 @@ static void ioat_dma_free_chan_resources(struct dma_chan *chan)
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ioat_dma_memcpy_cleanup(ioat_chan);
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- ioatdma_chan_write8(ioat_chan, IOAT_CHANCMD_OFFSET, IOAT_CHANCMD_RESET);
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+ writeb(IOAT_CHANCMD_RESET, ioat_chan->reg_base + IOAT_CHANCMD_OFFSET);
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spin_lock_bh(&ioat_chan->desc_lock);
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list_for_each_entry_safe(desc, _desc, &ioat_chan->used_desc, node) {
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@@ -210,9 +209,9 @@ static void ioat_dma_free_chan_resources(struct dma_chan *chan)
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ioat_chan->last_completion = ioat_chan->completion_addr = 0;
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/* Tell hw the chan is free */
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- chanctrl = ioatdma_chan_read16(ioat_chan, IOAT_CHANCTRL_OFFSET);
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+ chanctrl = readw(ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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chanctrl &= ~IOAT_CHANCTRL_CHANNEL_IN_USE;
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- ioatdma_chan_write16(ioat_chan, IOAT_CHANCTRL_OFFSET, chanctrl);
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+ writew(chanctrl, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
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}
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/**
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@@ -318,9 +317,8 @@ static dma_cookie_t do_ioat_dma_memcpy(struct ioat_dma_chan *ioat_chan,
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spin_unlock_bh(&ioat_chan->desc_lock);
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if (append)
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- ioatdma_chan_write8(ioat_chan,
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- IOAT_CHANCMD_OFFSET,
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- IOAT_CHANCMD_APPEND);
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+ writeb(IOAT_CHANCMD_APPEND,
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+ ioat_chan->reg_base + IOAT_CHANCMD_OFFSET);
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return cookie;
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}
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@@ -417,9 +415,8 @@ static void ioat_dma_memcpy_issue_pending(struct dma_chan *chan)
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if (ioat_chan->pending != 0) {
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ioat_chan->pending = 0;
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- ioatdma_chan_write8(ioat_chan,
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- IOAT_CHANCMD_OFFSET,
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- IOAT_CHANCMD_APPEND);
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+ writeb(IOAT_CHANCMD_APPEND,
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+ ioat_chan->reg_base + IOAT_CHANCMD_OFFSET);
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}
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}
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@@ -449,7 +446,7 @@ static void ioat_dma_memcpy_cleanup(struct ioat_dma_chan *chan)
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if ((chan->completion_virt->full & IOAT_CHANSTS_DMA_TRANSFER_STATUS) ==
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IOAT_CHANSTS_DMA_TRANSFER_STATUS_HALTED) {
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printk("IOAT: Channel halted, chanerr = %x\n",
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- ioatdma_chan_read32(chan, IOAT_CHANERR_OFFSET));
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+ readl(chan->reg_base + IOAT_CHANERR_OFFSET));
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/* TODO do something to salvage the situation */
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}
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@@ -569,21 +566,21 @@ static irqreturn_t ioat_do_interrupt(int irq, void *data)
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unsigned long attnstatus;
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u8 intrctrl;
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- intrctrl = ioatdma_read8(instance, IOAT_INTRCTRL_OFFSET);
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+ intrctrl = readb(instance->reg_base + IOAT_INTRCTRL_OFFSET);
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if (!(intrctrl & IOAT_INTRCTRL_MASTER_INT_EN))
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return IRQ_NONE;
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if (!(intrctrl & IOAT_INTRCTRL_INT_STATUS)) {
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- ioatdma_write8(instance, IOAT_INTRCTRL_OFFSET, intrctrl);
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+ writeb(intrctrl, instance->reg_base + IOAT_INTRCTRL_OFFSET);
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return IRQ_NONE;
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}
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- attnstatus = ioatdma_read32(instance, IOAT_ATTNSTATUS_OFFSET);
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+ attnstatus = readl(instance->reg_base + IOAT_ATTNSTATUS_OFFSET);
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printk(KERN_ERR "ioatdma error: interrupt! status %lx\n", attnstatus);
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- ioatdma_write8(instance, IOAT_INTRCTRL_OFFSET, intrctrl);
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+ writeb(intrctrl, instance->reg_base + IOAT_INTRCTRL_OFFSET);
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return IRQ_HANDLED;
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}
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@@ -612,14 +609,13 @@ static void ioat_start_null_desc(struct ioat_dma_chan *ioat_chan)
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spin_unlock_bh(&ioat_chan->desc_lock);
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#if (BITS_PER_LONG == 64)
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- ioatdma_chan_write64(ioat_chan, IOAT_CHAINADDR_OFFSET, desc->phys);
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+ writeq(desc->phys, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET);
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#else
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- ioatdma_chan_write32(ioat_chan,
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- IOAT_CHAINADDR_OFFSET_LOW,
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- (u32) desc->phys);
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- ioatdma_chan_write32(ioat_chan, IOAT_CHAINADDR_OFFSET_HIGH, 0);
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+ writel((u32) desc->phys,
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+ ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_LOW);
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+ writel(0, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_HIGH);
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#endif
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- ioatdma_chan_write8(ioat_chan, IOAT_CHANCMD_OFFSET, IOAT_CHANCMD_START);
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+ writeb(IOAT_CHANCMD_START, ioat_chan->reg_base + IOAT_CHANCMD_OFFSET);
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}
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/*
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@@ -748,7 +744,7 @@ static int __devinit ioat_probe(struct pci_dev *pdev,
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device->reg_base = reg_base;
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- ioatdma_write8(device, IOAT_INTRCTRL_OFFSET, IOAT_INTRCTRL_MASTER_INT_EN);
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+ writeb(IOAT_INTRCTRL_MASTER_INT_EN, device->reg_base + IOAT_INTRCTRL_OFFSET);
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pci_set_master(pdev);
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INIT_LIST_HEAD(&device->common.channels);
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