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@@ -1071,10 +1071,9 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
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}
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/*
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- * Set/change channels. If the channel is really being changed,
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- * it's done by reseting the chip. To accomplish this we must
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- * first cleanup any pending DMA, then restart stuff after a la
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- * ath5k_init.
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+ * Set/change channels. We always reset the chip.
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+ * To accomplish this we must first cleanup any pending DMA,
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+ * then restart stuff after a la ath5k_init.
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*
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* Called with sc->lock.
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*/
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@@ -1084,19 +1083,13 @@ ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan)
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ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "(%u MHz) -> (%u MHz)\n",
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sc->curchan->center_freq, chan->center_freq);
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- if (chan->center_freq != sc->curchan->center_freq ||
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- chan->hw_value != sc->curchan->hw_value) {
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-
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- /*
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- * To switch channels clear any pending DMA operations;
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- * wait long enough for the RX fifo to drain, reset the
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- * hardware at the new frequency, and then re-enable
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- * the relevant bits of the h/w.
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- */
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- return ath5k_reset(sc, chan);
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- }
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-
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- return 0;
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+ /*
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+ * To switch channels clear any pending DMA operations;
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+ * wait long enough for the RX fifo to drain, reset the
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+ * hardware at the new frequency, and then re-enable
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+ * the relevant bits of the h/w.
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+ */
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+ return ath5k_reset(sc, chan);
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}
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static void
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@@ -2811,9 +2804,11 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
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mutex_lock(&sc->lock);
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- ret = ath5k_chan_set(sc, conf->channel);
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- if (ret < 0)
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- goto unlock;
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+ if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
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+ ret = ath5k_chan_set(sc, conf->channel);
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+ if (ret < 0)
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+ goto unlock;
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+ }
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if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
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(sc->power_level != conf->power_level)) {
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