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@@ -1078,6 +1078,19 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
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mdelay(1);
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mdelay(1);
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}
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}
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+ /*
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+ * Perform ADC test (?)
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+ */
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+ data = ath5k_hw_reg_read(ah, AR5K_PHY_TST1);
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+ ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1);
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+ for (i = 0; i <= 20; i++) {
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+ if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10))
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+ break;
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+ udelay(200);
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+ }
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+ ath5k_hw_reg_write(ah, data, AR5K_PHY_TST1);
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+ data = 0;
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+
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/*
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/*
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* Enable calibration and wait until completion
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* Enable calibration and wait until completion
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*/
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*/
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