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@@ -11,18 +11,33 @@
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#ifndef PLAT_S5P_MIPI_CSIS_H_
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#ifndef PLAT_S5P_MIPI_CSIS_H_
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#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
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#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
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+struct platform_device;
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+
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/**
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/**
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* struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
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* struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
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* @clk_rate: bus clock frequency
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* @clk_rate: bus clock frequency
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* @lanes: number of data lanes used
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* @lanes: number of data lanes used
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* @alignment: data alignment in bits
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* @alignment: data alignment in bits
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* @hs_settle: HS-RX settle time
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* @hs_settle: HS-RX settle time
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+ * @fixed_phy_vdd: false to enable external D-PHY regulator management in the
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+ * driver or true in case this regulator has no enable function
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+ * @phy_enable: pointer to a callback controlling D-PHY enable/reset
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*/
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*/
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struct s5p_platform_mipi_csis {
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struct s5p_platform_mipi_csis {
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unsigned long clk_rate;
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unsigned long clk_rate;
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u8 lanes;
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u8 lanes;
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u8 alignment;
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u8 alignment;
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u8 hs_settle;
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u8 hs_settle;
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+ bool fixed_phy_vdd;
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+ int (*phy_enable)(struct platform_device *pdev, bool on);
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};
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};
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+/**
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+ * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control
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+ * @pdev: MIPI-CSIS platform device
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+ * @on: true to enable D-PHY and deassert its reset
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+ * false to disable D-PHY
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+ */
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+int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
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+
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#endif /* PLAT_S5P_MIPI_CSIS_H_ */
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#endif /* PLAT_S5P_MIPI_CSIS_H_ */
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