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@@ -636,28 +636,29 @@ static int s5h1411_read_status(struct dvb_frontend *fe, fe_status_t *status)
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*status = 0;
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- /* Get the demodulator status */
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- reg = (s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xf2) >> 15)
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- & 0x0001;
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- if (reg)
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- *status |= FE_HAS_LOCK | FE_HAS_CARRIER | FE_HAS_SIGNAL;
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+ /* Register F2 bit 15 = Master Lock, removed */
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switch (state->current_modulation) {
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case QAM_64:
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case QAM_256:
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reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xf0);
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- if (reg & 0x100)
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- *status |= FE_HAS_VITERBI;
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- if (reg & 0x10)
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- *status |= FE_HAS_SYNC;
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+ if (reg & 0x10) /* QAM FEC Lock */
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+ *status |= FE_HAS_SYNC | FE_HAS_LOCK;
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+ if (reg & 0x100) /* QAM EQ Lock */
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+ *status |= FE_HAS_VITERBI | FE_HAS_CARRIER | FE_HAS_SIGNAL;
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+
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break;
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case VSB_8:
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- reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0x5e);
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- if (reg & 0x0001)
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- *status |= FE_HAS_SYNC;
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reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xf2);
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- if (reg & 0x1000)
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- *status |= FE_HAS_VITERBI;
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+ if (reg & 0x1000) /* FEC Lock */
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+ *status |= FE_HAS_SYNC | FE_HAS_LOCK;
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+ if (reg & 0x2000) /* EQ Lock */
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+ *status |= FE_HAS_VITERBI | FE_HAS_CARRIER | FE_HAS_SIGNAL;
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+
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+ reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0x53);
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+ if (reg & 0x1) /* AFC Lock */
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+ *status |= FE_HAS_SIGNAL;
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+
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break;
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default:
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return -EINVAL;
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