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@@ -2138,31 +2138,14 @@ static void apic_pm_activate(void) { }
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#endif /* CONFIG_PM */
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#ifdef CONFIG_X86_64
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-/*
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- * apic_is_clustered_box() -- Check if we can expect good TSC
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- *
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- * Thus far, the major user of this is IBM's Summit2 series:
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- *
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- * Clustered boxes may have unsynced TSC problems if they are
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- * multi-chassis. Use available data to take a good guess.
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- * If in doubt, go HPET.
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- */
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-__cpuinit int apic_is_clustered_box(void)
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+
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+static int __cpuinit apic_cluster_num(void)
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{
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int i, clusters, zeros;
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unsigned id;
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u16 *bios_cpu_apicid;
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DECLARE_BITMAP(clustermap, NUM_APIC_CLUSTERS);
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- /*
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- * there is not this kind of box with AMD CPU yet.
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- * Some AMD box with quadcore cpu and 8 sockets apicid
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- * will be [4, 0x23] or [8, 0x27] could be thought to
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- * vsmp box still need checking...
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- */
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- if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && !is_vsmp_box())
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- return 0;
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-
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bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid);
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bitmap_zero(clustermap, NUM_APIC_CLUSTERS);
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@@ -2198,18 +2181,67 @@ __cpuinit int apic_is_clustered_box(void)
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++zeros;
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}
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- /* ScaleMP vSMPowered boxes have one cluster per board and TSCs are
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- * not guaranteed to be synced between boards
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- */
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- if (is_vsmp_box() && clusters > 1)
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+ return clusters;
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+}
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+
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+static int __cpuinitdata multi_checked;
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+static int __cpuinitdata multi;
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+
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+static int __cpuinit set_multi(const struct dmi_system_id *d)
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+{
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+ if (multi)
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+ return 0;
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+ printk(KERN_INFO "APIC: %s detected, Multi Chassis\n", d->ident);
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+ multi = 1;
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+ return 0;
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+}
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+
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+static const __cpuinitconst struct dmi_system_id multi_dmi_table[] = {
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+ {
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+ .callback = set_multi,
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+ .ident = "IBM System Summit2",
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+ .matches = {
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+ DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
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+ DMI_MATCH(DMI_PRODUCT_NAME, "Summit2"),
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+ },
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+ },
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+ {}
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+};
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+
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+static void __cpuinit dmi_check_multi(void)
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+{
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+ if (multi_checked)
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+ return;
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+
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+ dmi_check_system(multi_dmi_table);
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+ multi_checked = 1;
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+}
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+
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+/*
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+ * apic_is_clustered_box() -- Check if we can expect good TSC
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+ *
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+ * Thus far, the major user of this is IBM's Summit2 series:
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+ * Clustered boxes may have unsynced TSC problems if they are
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+ * multi-chassis.
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+ * Use DMI to check them
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+ */
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+__cpuinit int apic_is_clustered_box(void)
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+{
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+ dmi_check_multi();
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+ if (multi)
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return 1;
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+ if (!is_vsmp_box())
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+ return 0;
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+
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/*
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- * If clusters > 2, then should be multi-chassis.
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- * May have to revisit this when multi-core + hyperthreaded CPUs come
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- * out, but AFAIK this will work even for them.
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+ * ScaleMP vSMPowered boxes have one cluster per board and TSCs are
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+ * not guaranteed to be synced between boards
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*/
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- return (clusters > 2);
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+ if (apic_cluster_num() > 1)
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+ return 1;
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+
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+ return 0;
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}
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#endif
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