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+/*
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+ * MPC8272 ADS Device Tree Source
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+ *
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+ * Copyright 2005 Freescale Semiconductor Inc.
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+
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+/ {
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+ model = "MPC8272ADS";
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+ compatible = "MPC8260ADS";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ linux,phandle = <100>;
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+
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+ cpus {
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+ #cpus = <1>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ linux,phandle = <200>;
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+
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+ PowerPC,8272@0 {
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+ device_type = "cpu";
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+ reg = <0>;
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+ d-cache-line-size = <20>; // 32 bytes
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+ i-cache-line-size = <20>; // 32 bytes
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+ d-cache-size = <4000>; // L1, 16K
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+ i-cache-size = <4000>; // L1, 16K
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+ timebase-frequency = <0>;
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+ bus-frequency = <0>;
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+ clock-frequency = <0>;
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+ 32-bit;
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+ linux,phandle = <201>;
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+ linux,boot-cpu;
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+ };
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+ };
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+
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+ interrupt-controller@f8200000 {
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+ linux,phandle = <f8200000>;
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+ #address-cells = <0>;
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+ #interrupt-cells = <2>;
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+ interrupt-controller;
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+ reg = <f8200000 f8200004>;
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+ built-in;
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+ device_type = "pci-pic";
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+ };
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+ memory {
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+ device_type = "memory";
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+ linux,phandle = <300>;
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+ reg = <00000000 4000000 f4500000 00000020>;
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+ };
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+
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+ soc8272@f0000000 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ #interrupt-cells = <2>;
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+ device_type = "soc";
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+ ranges = < 0 0 2 00000000 f0000000 00053000>;
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+ reg = <f0000000 0>;
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+
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+ mdio@0 {
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+ device_type = "mdio";
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+ compatible = "fs_enet";
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+ reg = <0 0>;
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+ linux,phandle = <24520>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ethernet-phy@0 {
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+ linux,phandle = <2452000>;
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+ interrupt-parent = <10c00>;
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+ interrupts = <19 1>;
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+ reg = <0>;
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+ bitbang = [ 12 12 13 02 02 01 ];
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+ device_type = "ethernet-phy";
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+ };
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+ ethernet-phy@1 {
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+ linux,phandle = <2452001>;
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+ interrupt-parent = <10c00>;
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+ interrupts = <19 1>;
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+ bitbang = [ 12 12 13 02 02 01 ];
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+ reg = <3>;
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+ device_type = "ethernet-phy";
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+ };
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+ };
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+
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+ ethernet@24000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ device_type = "network";
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+ device-id = <2>;
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+ compatible = "fs_enet";
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+ model = "FCC";
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+ reg = <11300 20 8400 100 11380 30>;
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+ mac-address = [ 00 11 2F 99 43 54 ];
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+ interrupts = <20 2>;
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+ interrupt-parent = <10c00>;
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+ phy-handle = <2452000>;
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+ rx-clock = <13>;
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+ tx-clock = <12>;
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+ };
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+
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+ ethernet@25000 {
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+ device_type = "network";
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+ device-id = <3>;
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+ compatible = "fs_enet";
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+ model = "FCC";
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+ reg = <11320 20 8500 100 113b0 30>;
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+ mac-address = [ 00 11 2F 99 44 54 ];
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+ interrupts = <21 2>;
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+ interrupt-parent = <10c00>;
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+ phy-handle = <2452001>;
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+ rx-clock = <17>;
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+ tx-clock = <18>;
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+ };
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+
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+ cpm@f0000000 {
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+ linux,phandle = <f0000000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ #interrupt-cells = <2>;
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+ device_type = "cpm";
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+ model = "CPM2";
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+ ranges = <00000000 00000000 3ffff>;
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+ reg = <10d80 3280>;
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+ command-proc = <119c0>;
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+ brg-frequency = <17D7840>;
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+ cpm_clk = <BEBC200>;
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+
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+ scc@11a00 {
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+ device_type = "serial";
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+ compatible = "cpm_uart";
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+ model = "SCC";
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+ device-id = <2>;
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+ reg = <11a00 20 8000 100>;
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+ current-speed = <1c200>;
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+ interrupts = <28 2>;
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+ interrupt-parent = <10c00>;
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+ clock-setup = <0 00ffffff>;
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+ rx-clock = <1>;
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+ tx-clock = <1>;
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+ };
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+
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+ scc@11a60 {
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+ device_type = "serial";
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+ compatible = "cpm_uart";
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+ model = "SCC";
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+ device-id = <5>;
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+ reg = <11a60 20 8300 100>;
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+ current-speed = <1c200>;
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+ interrupts = <2b 2>;
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+ interrupt-parent = <10c00>;
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+ clock-setup = <1b ffffff00>;
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+ rx-clock = <4>;
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+ tx-clock = <4>;
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+ };
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+
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+ };
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+ interrupt-controller@10c00 {
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+ linux,phandle = <10c00>;
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+ #address-cells = <0>;
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+ #interrupt-cells = <2>;
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+ interrupt-controller;
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+ reg = <10c00 80>;
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+ built-in;
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+ device_type = "cpm-pic";
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+ compatible = "CPM2";
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+ };
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+ pci@0500 {
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+ linux,phandle = <0500>;
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+ #interrupt-cells = <1>;
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+ #size-cells = <2>;
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+ #address-cells = <3>;
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+ compatible = "8272";
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+ device_type = "pci";
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+ reg = <10430 4dc>;
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+ clock-frequency = <3f940aa>;
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+ interrupt-map-mask = <f800 0 0 7>;
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+ interrupt-map = <
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+
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+ /* IDSEL 0x16 */
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+ b000 0 0 1 f8200000 40 0
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+ b000 0 0 2 f8200000 41 0
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+ b000 0 0 3 f8200000 42 0
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+ b000 0 0 4 f8200000 43 0
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+
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+ /* IDSEL 0x17 */
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+ b800 0 0 1 f8200000 43 0
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+ b800 0 0 2 f8200000 40 0
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+ b800 0 0 3 f8200000 41 0
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+ b800 0 0 4 f8200000 42 0
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+
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+ /* IDSEL 0x18 */
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+ c000 0 0 1 f8200000 42 0
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+ c000 0 0 2 f8200000 43 0
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+ c000 0 0 3 f8200000 40 0
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+ c000 0 0 4 f8200000 41 0>;
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+ interrupt-parent = <10c00>;
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+ interrupts = <14 3>;
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+ bus-range = <0 0>;
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+ ranges = <02000000 0 80000000 80000000 0 40000000
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+ 01000000 0 00000000 f6000000 0 02000000>;
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+ };
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+
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+/* May need to remove if on a part without crypto engine */
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+ crypto@30000 {
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+ device_type = "crypto";
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+ model = "SEC2";
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+ compatible = "talitos";
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+ reg = <30000 10000>;
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+ interrupts = <b 0>;
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+ interrupt-parent = <10c00>;
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+ num-channels = <4>;
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+ channel-fifo-len = <18>;
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+ exec-units-mask = <0000007e>;
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+/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
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+ descriptor-types-mask = <01010ebf>;
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+ };
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+
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+ };
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+};
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Vitaly Bordug