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@@ -25,6 +25,7 @@
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#define PPC_INST_LSWI 0x7c0004aa
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#define PPC_INST_LSWX 0x7c00042a
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#define PPC_INST_LWSYNC 0x7c2004ac
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+#define PPC_INST_LXVD2X 0x7c000698
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#define PPC_INST_MCRXR 0x7c000400
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#define PPC_INST_MCRXR_MASK 0xfc0007fe
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#define PPC_INST_MFSPR_PVR 0x7c1f42a6
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@@ -43,12 +44,14 @@
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#define PPC_INST_STSWI 0x7c0005aa
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#define PPC_INST_STSWX 0x7c00052a
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+#define PPC_INST_STXVD2X 0x7c000798
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#define PPC_INST_TLBILX 0x7c000024
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#define PPC_INST_WAIT 0x7c00007c
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/* macros to insert fields into opcodes */
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#define __PPC_RA(a) (((a) & 0x1f) << 16)
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#define __PPC_RB(b) (((b) & 0x1f) << 11)
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+#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
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#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
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#define __PPC_WC(w) (((w) & 0x3) << 21)
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@@ -70,4 +73,14 @@
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#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
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__PPC_WC(w))
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+/*
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+ * Define what the VSX XX1 form instructions will look like, then add
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+ * the 128 bit load store instructions based on that.
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+ */
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+#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
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+#define STXVD2X(s, a, b) stringify_in_c(.long PPC_INST_STXVD2X | \
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+ VSX_XX1((s), (a), (b)))
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+#define LXVD2X(s, a, b) stringify_in_c(.long PPC_INST_LXVD2X | \
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+ VSX_XX1((s), (a), (b)))
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+
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#endif /* _ASM_POWERPC_PPC_OPCODE_H */
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