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@@ -58,12 +58,12 @@ typedef PREPACK struct _AR6K_IRQ_PROC_REGISTERS {
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#define AR6K_IRQ_PROC_REGS_SIZE sizeof(AR6K_IRQ_PROC_REGISTERS)
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-typedef PREPACK struct _AR6K_IRQ_ENABLE_REGISTERS {
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+PREPACK struct ar6k_irq_enable_registers {
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u8 int_status_enable;
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u8 cpu_int_status_enable;
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u8 error_status_enable;
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u8 counter_int_status_enable;
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-} POSTPACK AR6K_IRQ_ENABLE_REGISTERS;
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+} POSTPACK;
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PREPACK struct ar6k_gmbox_ctrl_registers {
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u8 int_status_enable;
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@@ -71,7 +71,7 @@ PREPACK struct ar6k_gmbox_ctrl_registers {
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#include "athendpack.h"
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-#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(AR6K_IRQ_ENABLE_REGISTERS)
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+#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(struct ar6k_irq_enable_registers)
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#define AR6K_REG_IO_BUFFER_SIZE 32
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#define AR6K_MAX_REG_IO_BUFFERS 8
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@@ -110,7 +110,7 @@ struct ar6k_device {
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u8 _Pad1[A_CACHE_LINE_PAD];
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AR6K_IRQ_PROC_REGISTERS IrqProcRegisters; /* cache-line safe with pads around */
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u8 _Pad2[A_CACHE_LINE_PAD];
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- AR6K_IRQ_ENABLE_REGISTERS IrqEnableRegisters; /* cache-line safe with pads around */
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+ struct ar6k_irq_enable_registers IrqEnableRegisters; /* cache-line safe with pads around */
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u8 _Pad3[A_CACHE_LINE_PAD];
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void *HIFDevice;
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u32 BlockSize;
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@@ -160,7 +160,7 @@ int DevCheckPendingRecvMsgsAsync(void *context);
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void DevAsyncIrqProcessComplete(struct ar6k_device *pDev);
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void DevDumpRegisters(struct ar6k_device *pDev,
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AR6K_IRQ_PROC_REGISTERS *pIrqProcRegs,
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- AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs);
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+ struct ar6k_irq_enable_registers *pIrqEnableRegs);
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#define DEV_STOP_RECV_ASYNC true
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#define DEV_STOP_RECV_SYNC false
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