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@@ -187,10 +187,15 @@ static void gpio_irq_enable(unsigned irq)
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{
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struct gpio_controller *__iomem g = get_irq_chip_data(irq);
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u32 mask = __gpio_mask(irq_to_gpio(irq));
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+ unsigned status = irq_desc[irq].status;
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- if (irq_desc[irq].status & IRQ_TYPE_EDGE_FALLING)
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+ status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
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+ if (!status)
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+ status = IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
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+
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+ if (status & IRQ_TYPE_EDGE_FALLING)
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__raw_writel(mask, &g->set_falling);
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- if (irq_desc[irq].status & IRQ_TYPE_EDGE_RISING)
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+ if (status & IRQ_TYPE_EDGE_RISING)
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__raw_writel(mask, &g->set_rising);
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}
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@@ -205,10 +210,13 @@ static int gpio_irq_type(unsigned irq, unsigned trigger)
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irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
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irq_desc[irq].status |= trigger;
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- __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
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- ? &g->set_falling : &g->clr_falling);
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- __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
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- ? &g->set_rising : &g->clr_rising);
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+ /* don't enable the IRQ if it's currently disabled */
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+ if (irq_desc[irq].depth == 0) {
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+ __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
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+ ? &g->set_falling : &g->clr_falling);
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+ __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
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+ ? &g->set_rising : &g->clr_rising);
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+ }
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return 0;
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}
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