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@@ -29,38 +29,41 @@ static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
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/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
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/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
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-static void s3c_irq_timer_mask(unsigned int irq)
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+static void s3c_irq_timer_mask(struct irq_data *data)
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{
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{
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u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
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u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
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+ u32 mask = (u32)data->chip_data;
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reg &= 0x1f; /* mask out pending interrupts */
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reg &= 0x1f; /* mask out pending interrupts */
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- reg &= ~(1 << (irq - IRQ_TIMER0));
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+ reg &= ~mask;
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__raw_writel(reg, S3C64XX_TINT_CSTAT);
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__raw_writel(reg, S3C64XX_TINT_CSTAT);
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}
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}
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-static void s3c_irq_timer_unmask(unsigned int irq)
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+static void s3c_irq_timer_unmask(struct irq_data *data)
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{
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{
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u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
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u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
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+ u32 mask = (u32)data->chip_data;
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reg &= 0x1f; /* mask out pending interrupts */
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reg &= 0x1f; /* mask out pending interrupts */
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- reg |= 1 << (irq - IRQ_TIMER0);
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+ reg |= mask;
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__raw_writel(reg, S3C64XX_TINT_CSTAT);
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__raw_writel(reg, S3C64XX_TINT_CSTAT);
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}
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}
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-static void s3c_irq_timer_ack(unsigned int irq)
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+static void s3c_irq_timer_ack(struct irq_data *data)
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{
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{
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u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
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u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
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+ u32 mask = (u32)data->chip_data;
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reg &= 0x1f;
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reg &= 0x1f;
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- reg |= (1 << 5) << (irq - IRQ_TIMER0);
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+ reg |= mask << 5;
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__raw_writel(reg, S3C64XX_TINT_CSTAT);
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__raw_writel(reg, S3C64XX_TINT_CSTAT);
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}
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}
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static struct irq_chip s3c_irq_timer = {
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static struct irq_chip s3c_irq_timer = {
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.name = "s3c-timer",
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.name = "s3c-timer",
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- .mask = s3c_irq_timer_mask,
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- .unmask = s3c_irq_timer_unmask,
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- .ack = s3c_irq_timer_ack,
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+ .irq_mask = s3c_irq_timer_mask,
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+ .irq_unmask = s3c_irq_timer_unmask,
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+ .irq_ack = s3c_irq_timer_ack,
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};
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};
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/**
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/**
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@@ -79,6 +82,7 @@ void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
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set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
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set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
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set_irq_chip(timer_irq, &s3c_irq_timer);
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set_irq_chip(timer_irq, &s3c_irq_timer);
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+ set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0)));
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set_irq_handler(timer_irq, handle_level_irq);
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set_irq_handler(timer_irq, handle_level_irq);
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set_irq_flags(timer_irq, IRQF_VALID);
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set_irq_flags(timer_irq, IRQF_VALID);
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