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@@ -217,6 +217,7 @@
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/* In module TWL4030_MODULE_PM_MASTER */
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/* In module TWL4030_MODULE_PM_MASTER */
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#define PROTECT_KEY 0x0E
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#define PROTECT_KEY 0x0E
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+#define STS_HW_CONDITIONS 0x0F
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/* In module TWL4030_MODULE_PM_RECEIVER */
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/* In module TWL4030_MODULE_PM_RECEIVER */
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#define VUSB_DEDICATED1 0x7D
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#define VUSB_DEDICATED1 0x7D
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@@ -351,15 +352,26 @@ static enum linkstat twl4030_usb_linkstat(struct twl4030_usb *twl)
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int status;
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int status;
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int linkstat = USB_LINK_UNKNOWN;
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int linkstat = USB_LINK_UNKNOWN;
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- /* STS_HW_CONDITIONS */
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- status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER, 0x0f);
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+ /*
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+ * For ID/VBUS sensing, see manual section 15.4.8 ...
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+ * except when using only battery backup power, two
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+ * comparators produce VBUS_PRES and ID_PRES signals,
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+ * which don't match docs elsewhere. But ... BIT(7)
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+ * and BIT(2) of STS_HW_CONDITIONS, respectively, do
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+ * seem to match up. If either is true the USB_PRES
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+ * signal is active, the OTG module is activated, and
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+ * its interrupt may be raised (may wake the system).
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+ */
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+ status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER,
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+ STS_HW_CONDITIONS);
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if (status < 0)
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if (status < 0)
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dev_err(twl->dev, "USB link status err %d\n", status);
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dev_err(twl->dev, "USB link status err %d\n", status);
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- else if (status & BIT(7))
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- linkstat = USB_LINK_VBUS;
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- else if (status & BIT(2))
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- linkstat = USB_LINK_ID;
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- else
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+ else if (status & (BIT(7) | BIT(2))) {
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+ if (status & BIT(2))
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+ linkstat = USB_LINK_ID;
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+ else
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+ linkstat = USB_LINK_VBUS;
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+ } else
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linkstat = USB_LINK_NONE;
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linkstat = USB_LINK_NONE;
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dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
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dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
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