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@@ -44,6 +44,8 @@ static bool static_hdmi_pcm;
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module_param(static_hdmi_pcm, bool, 0644);
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MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
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+#define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
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+
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struct hdmi_spec_per_cvt {
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hda_nid_t cvt_nid;
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int assigned;
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@@ -894,6 +896,11 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
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if (!channels)
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return;
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+ if (is_haswell(codec))
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+ snd_hda_codec_write(codec, pin_nid, 0,
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+ AC_VERB_SET_AMP_GAIN_MUTE,
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+ AMP_OUT_UNMUTE);
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+
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eld = &per_pin->sink_eld;
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if (!eld->monitor_present)
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return;
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@@ -1033,10 +1040,10 @@ static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
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hdmi_non_intrinsic_event(codec, res);
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}
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-static void haswell_verify_pin_D0(struct hda_codec *codec,
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+static void haswell_verify_D0(struct hda_codec *codec,
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hda_nid_t cvt_nid, hda_nid_t nid)
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{
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- int pwr, lamp, ramp;
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+ int pwr;
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/* For Haswell, the converter 1/2 may keep in D3 state after bootup,
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* thus pins could only choose converter 0 for use. Make sure the
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@@ -1052,25 +1059,6 @@ static void haswell_verify_pin_D0(struct hda_codec *codec,
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pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
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snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
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}
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-
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- lamp = snd_hda_codec_read(codec, nid, 0,
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- AC_VERB_GET_AMP_GAIN_MUTE,
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- AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
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- ramp = snd_hda_codec_read(codec, nid, 0,
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- AC_VERB_GET_AMP_GAIN_MUTE,
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- AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
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- if (lamp != ramp) {
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- snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
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- AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
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-
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- lamp = snd_hda_codec_read(codec, nid, 0,
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- AC_VERB_GET_AMP_GAIN_MUTE,
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- AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
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- ramp = snd_hda_codec_read(codec, nid, 0,
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- AC_VERB_GET_AMP_GAIN_MUTE,
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- AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
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- snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
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- }
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}
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/*
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@@ -1087,8 +1075,8 @@ static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
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int pinctl;
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int new_pinctl = 0;
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- if (codec->vendor_id == 0x80862807)
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- haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
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+ if (is_haswell(codec))
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+ haswell_verify_D0(codec, cvt_nid, pin_nid);
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if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
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pinctl = snd_hda_codec_read(codec, pin_nid, 0,
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@@ -1227,7 +1215,7 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
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mux_idx);
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/* configure unused pins to choose other converters */
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- if (codec->vendor_id == 0x80862807)
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+ if (is_haswell(codec))
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haswell_config_cvts(codec, pin_idx, mux_idx);
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snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
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@@ -1358,14 +1346,10 @@ static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
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/* Haswell-specific workaround: re-setup when the transcoder is
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* changed during the stream playback
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*/
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- if (codec->vendor_id == 0x80862807 &&
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- eld->eld_valid && !old_eld_valid && per_pin->setup) {
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- snd_hda_codec_write(codec, pin_nid, 0,
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- AC_VERB_SET_AMP_GAIN_MUTE,
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- AMP_OUT_UNMUTE);
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+ if (is_haswell(codec) &&
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+ eld->eld_valid && !old_eld_valid && per_pin->setup)
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hdmi_setup_audio_infoframe(codec, per_pin,
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per_pin->non_pcm);
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- }
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}
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mutex_unlock(&pin_eld->lock);
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@@ -1405,7 +1389,7 @@ static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
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if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
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return 0;
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- if (codec->vendor_id == 0x80862807)
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+ if (is_haswell(codec))
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intel_haswell_fixup_connect_list(codec, pin_nid);
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pin_idx = spec->num_pins;
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@@ -2014,7 +1998,7 @@ static int patch_generic_hdmi(struct hda_codec *codec)
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codec->spec = spec;
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hdmi_array_init(spec, 4);
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- if (codec->vendor_id == 0x80862807) {
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+ if (is_haswell(codec)) {
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intel_haswell_enable_all_pins(codec, true);
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intel_haswell_fixup_enable_dp12(codec);
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}
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@@ -2025,7 +2009,7 @@ static int patch_generic_hdmi(struct hda_codec *codec)
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return -EINVAL;
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}
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codec->patch_ops = generic_hdmi_patch_ops;
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- if (codec->vendor_id == 0x80862807) {
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+ if (is_haswell(codec)) {
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codec->patch_ops.set_power_state = haswell_set_power_state;
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codec->dp_mst = true;
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}
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