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@@ -32,6 +32,7 @@ MODULE_AUTHOR("Shu Lin - Hiep Huynh");
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MODULE_LICENSE("GPL");
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MODULE_LICENSE("GPL");
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struct list_head cx25821_devlist;
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struct list_head cx25821_devlist;
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+EXPORT_SYMBOL(cx25821_devlist);
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static unsigned int debug;
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static unsigned int debug;
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module_param(debug, int, 0644);
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module_param(debug, int, 0644);
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@@ -313,6 +314,7 @@ struct sram_channel cx25821_sram_channels[] = {
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.irq_bit = 11,
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.irq_bit = 11,
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},
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},
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};
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};
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+EXPORT_SYMBOL(cx25821_sram_channels);
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struct sram_channel *channel0 = &cx25821_sram_channels[SRAM_CH00];
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struct sram_channel *channel0 = &cx25821_sram_channels[SRAM_CH00];
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struct sram_channel *channel1 = &cx25821_sram_channels[SRAM_CH01];
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struct sram_channel *channel1 = &cx25821_sram_channels[SRAM_CH01];
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@@ -388,70 +390,74 @@ static void cx25821_registers_init(struct cx25821_dev *dev)
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{
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{
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u32 tmp;
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u32 tmp;
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- // enable RUN_RISC in Pecos
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+ /* enable RUN_RISC in Pecos */
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cx_write(DEV_CNTRL2, 0x20);
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cx_write(DEV_CNTRL2, 0x20);
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- // Set the master PCI interrupt masks to enable video, audio, MBIF, and GPIO interrupts
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- // I2C interrupt masking is handled by the I2C objects themselves.
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+ /* Set the master PCI interrupt masks to enable video, audio, MBIF,
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+ * and GPIO interrupts
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+ * I2C interrupt masking is handled by the I2C objects themselves. */
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cx_write(PCI_INT_MSK, 0x2001FFFF);
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cx_write(PCI_INT_MSK, 0x2001FFFF);
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tmp = cx_read(RDR_TLCTL0);
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tmp = cx_read(RDR_TLCTL0);
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- tmp &= ~FLD_CFG_RCB_CK_EN; // Clear the RCB_CK_EN bit
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+ tmp &= ~FLD_CFG_RCB_CK_EN; /* Clear the RCB_CK_EN bit */
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cx_write(RDR_TLCTL0, tmp);
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cx_write(RDR_TLCTL0, tmp);
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- // PLL-A setting for the Audio Master Clock
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+ /* PLL-A setting for the Audio Master Clock */
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cx_write(PLL_A_INT_FRAC, 0x9807A58B);
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cx_write(PLL_A_INT_FRAC, 0x9807A58B);
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- // PLL_A_POST = 0x1C, PLL_A_OUT_TO_PIN = 0x1
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+ /* PLL_A_POST = 0x1C, PLL_A_OUT_TO_PIN = 0x1 */
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cx_write(PLL_A_POST_STAT_BIST, 0x8000019C);
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cx_write(PLL_A_POST_STAT_BIST, 0x8000019C);
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- // clear reset bit [31]
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+ /* clear reset bit [31] */
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tmp = cx_read(PLL_A_INT_FRAC);
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tmp = cx_read(PLL_A_INT_FRAC);
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cx_write(PLL_A_INT_FRAC, tmp & 0x7FFFFFFF);
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cx_write(PLL_A_INT_FRAC, tmp & 0x7FFFFFFF);
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- // PLL-B setting for Mobilygen Host Bus Interface
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+ /* PLL-B setting for Mobilygen Host Bus Interface */
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cx_write(PLL_B_INT_FRAC, 0x9883A86F);
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cx_write(PLL_B_INT_FRAC, 0x9883A86F);
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- // PLL_B_POST = 0xD, PLL_B_OUT_TO_PIN = 0x0
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+ /* PLL_B_POST = 0xD, PLL_B_OUT_TO_PIN = 0x0 */
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cx_write(PLL_B_POST_STAT_BIST, 0x8000018D);
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cx_write(PLL_B_POST_STAT_BIST, 0x8000018D);
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- // clear reset bit [31]
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+ /* clear reset bit [31] */
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tmp = cx_read(PLL_B_INT_FRAC);
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tmp = cx_read(PLL_B_INT_FRAC);
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cx_write(PLL_B_INT_FRAC, tmp & 0x7FFFFFFF);
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cx_write(PLL_B_INT_FRAC, tmp & 0x7FFFFFFF);
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- // PLL-C setting for video upstream channel
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+ /* PLL-C setting for video upstream channel */
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cx_write(PLL_C_INT_FRAC, 0x96A0EA3F);
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cx_write(PLL_C_INT_FRAC, 0x96A0EA3F);
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- // PLL_C_POST = 0x3, PLL_C_OUT_TO_PIN = 0x0
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+ /* PLL_C_POST = 0x3, PLL_C_OUT_TO_PIN = 0x0 */
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cx_write(PLL_C_POST_STAT_BIST, 0x80000103);
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cx_write(PLL_C_POST_STAT_BIST, 0x80000103);
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- // clear reset bit [31]
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+ /* clear reset bit [31] */
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tmp = cx_read(PLL_C_INT_FRAC);
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tmp = cx_read(PLL_C_INT_FRAC);
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cx_write(PLL_C_INT_FRAC, tmp & 0x7FFFFFFF);
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cx_write(PLL_C_INT_FRAC, tmp & 0x7FFFFFFF);
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- // PLL-D setting for audio upstream channel
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+ /* PLL-D setting for audio upstream channel */
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cx_write(PLL_D_INT_FRAC, 0x98757F5B);
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cx_write(PLL_D_INT_FRAC, 0x98757F5B);
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- // PLL_D_POST = 0x13, PLL_D_OUT_TO_PIN = 0x0
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+ /* PLL_D_POST = 0x13, PLL_D_OUT_TO_PIN = 0x0 */
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cx_write(PLL_D_POST_STAT_BIST, 0x80000113);
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cx_write(PLL_D_POST_STAT_BIST, 0x80000113);
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- // clear reset bit [31]
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+ /* clear reset bit [31] */
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tmp = cx_read(PLL_D_INT_FRAC);
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tmp = cx_read(PLL_D_INT_FRAC);
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cx_write(PLL_D_INT_FRAC, tmp & 0x7FFFFFFF);
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cx_write(PLL_D_INT_FRAC, tmp & 0x7FFFFFFF);
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- // This selects the PLL C clock source for the video upstream channel I and J
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+ /* This selects the PLL C clock source for the video upstream channel
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+ * I and J */
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tmp = cx_read(VID_CH_CLK_SEL);
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tmp = cx_read(VID_CH_CLK_SEL);
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cx_write(VID_CH_CLK_SEL, (tmp & 0x00FFFFFF) | 0x24000000);
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cx_write(VID_CH_CLK_SEL, (tmp & 0x00FFFFFF) | 0x24000000);
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- // 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for channel A-C
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- //select 656/VIP DST for downstream Channel A - C
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+ /* 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for
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+ * channel A-C
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+ * select 656/VIP DST for downstream Channel A - C */
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tmp = cx_read(VID_CH_MODE_SEL);
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tmp = cx_read(VID_CH_MODE_SEL);
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- //cx_write( VID_CH_MODE_SEL, tmp | 0x1B0001FF);
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+ /* cx_write( VID_CH_MODE_SEL, tmp | 0x1B0001FF); */
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cx_write(VID_CH_MODE_SEL, tmp & 0xFFFFFE00);
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cx_write(VID_CH_MODE_SEL, tmp & 0xFFFFFE00);
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- // enables 656 port I and J as output
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+ /* enables 656 port I and J as output */
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tmp = cx_read(CLK_RST);
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tmp = cx_read(CLK_RST);
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- tmp |= FLD_USE_ALT_PLL_REF; // use external ALT_PLL_REF pin as its reference clock instead
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+ /* use external ALT_PLL_REF pin as its reference clock instead */
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+ tmp |= FLD_USE_ALT_PLL_REF;
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cx_write(CLK_RST, tmp & ~(FLD_VID_I_CLK_NOE | FLD_VID_J_CLK_NOE));
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cx_write(CLK_RST, tmp & ~(FLD_VID_I_CLK_NOE | FLD_VID_J_CLK_NOE));
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mdelay(100);
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mdelay(100);
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@@ -476,9 +482,8 @@ int cx25821_sram_channel_setup(struct cx25821_dev *dev,
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cdt = ch->cdt;
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cdt = ch->cdt;
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lines = ch->fifo_size / bpl;
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lines = ch->fifo_size / bpl;
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- if (lines > 4) {
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+ if (lines > 4)
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lines = 4;
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lines = 4;
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- }
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BUG_ON(lines < 2);
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BUG_ON(lines < 2);
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@@ -494,16 +499,15 @@ int cx25821_sram_channel_setup(struct cx25821_dev *dev,
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cx_write(cdt + 16 * i + 12, 0);
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cx_write(cdt + 16 * i + 12, 0);
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}
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}
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- //init the first cdt buffer
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+ /* init the first cdt buffer */
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for (i = 0; i < 128; i++)
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for (i = 0; i < 128; i++)
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cx_write(ch->fifo_start + 4 * i, i);
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cx_write(ch->fifo_start + 4 * i, i);
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/* write CMDS */
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/* write CMDS */
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- if (ch->jumponly) {
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+ if (ch->jumponly)
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cx_write(ch->cmds_start + 0, 8);
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cx_write(ch->cmds_start + 0, 8);
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- } else {
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+ else
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cx_write(ch->cmds_start + 0, risc);
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cx_write(ch->cmds_start + 0, risc);
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- }
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cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */
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cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */
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cx_write(ch->cmds_start + 8, cdt);
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cx_write(ch->cmds_start + 8, cdt);
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@@ -526,6 +530,7 @@ int cx25821_sram_channel_setup(struct cx25821_dev *dev,
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return 0;
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return 0;
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}
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}
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+EXPORT_SYMBOL(cx25821_sram_channel_setup);
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int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
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int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
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struct sram_channel *ch,
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struct sram_channel *ch,
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@@ -546,9 +551,8 @@ int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
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cdt = ch->cdt;
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cdt = ch->cdt;
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lines = ch->fifo_size / bpl;
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lines = ch->fifo_size / bpl;
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- if (lines > 3) {
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- lines = 3; //for AUDIO
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- }
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+ if (lines > 3)
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+ lines = 3; /* for AUDIO */
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BUG_ON(lines < 2);
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BUG_ON(lines < 2);
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@@ -565,25 +569,23 @@ int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
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}
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}
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/* write CMDS */
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/* write CMDS */
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- if (ch->jumponly) {
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+ if (ch->jumponly)
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cx_write(ch->cmds_start + 0, 8);
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cx_write(ch->cmds_start + 0, 8);
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- } else {
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+ else
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cx_write(ch->cmds_start + 0, risc);
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cx_write(ch->cmds_start + 0, risc);
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- }
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cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */
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cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */
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cx_write(ch->cmds_start + 8, cdt);
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cx_write(ch->cmds_start + 8, cdt);
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cx_write(ch->cmds_start + 12, (lines * 16) >> 3);
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cx_write(ch->cmds_start + 12, (lines * 16) >> 3);
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cx_write(ch->cmds_start + 16, ch->ctrl_start);
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cx_write(ch->cmds_start + 16, ch->ctrl_start);
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- //IQ size
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- if (ch->jumponly) {
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+ /* IQ size */
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+ if (ch->jumponly)
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cx_write(ch->cmds_start + 20, 0x80000000 | (64 >> 2));
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cx_write(ch->cmds_start + 20, 0x80000000 | (64 >> 2));
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- } else {
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+ else
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cx_write(ch->cmds_start + 20, 64 >> 2);
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cx_write(ch->cmds_start + 20, 64 >> 2);
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- }
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- //zero out
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+ /* zero out */
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for (i = 24; i < 80; i += 4)
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for (i = 24; i < 80; i += 4)
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cx_write(ch->cmds_start + i, 0);
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cx_write(ch->cmds_start + i, 0);
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@@ -595,6 +597,7 @@ int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
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return 0;
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return 0;
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}
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}
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+EXPORT_SYMBOL(cx25821_sram_channel_setup_audio);
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void cx25821_sram_channel_dump(struct cx25821_dev *dev, struct sram_channel *ch)
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void cx25821_sram_channel_dump(struct cx25821_dev *dev, struct sram_channel *ch)
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{
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{
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@@ -658,6 +661,7 @@ void cx25821_sram_channel_dump(struct cx25821_dev *dev, struct sram_channel *ch)
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printk(KERN_WARNING " : cnt2_reg: 0x%08x\n",
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printk(KERN_WARNING " : cnt2_reg: 0x%08x\n",
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cx_read(ch->cnt2_reg));
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cx_read(ch->cnt2_reg));
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}
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}
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+EXPORT_SYMBOL(cx25821_sram_channel_dump);
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void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev,
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void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev,
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struct sram_channel *ch)
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struct sram_channel *ch)
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@@ -731,7 +735,7 @@ void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev,
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printk(KERN_WARNING "instruction %d = 0x%x\n", i, risc);
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printk(KERN_WARNING "instruction %d = 0x%x\n", i, risc);
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}
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}
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- //read data from the first cdt buffer
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+ /* read data from the first cdt buffer */
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risc = cx_read(AUD_A_CDT);
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risc = cx_read(AUD_A_CDT);
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printk(KERN_WARNING "\nread cdt loc=0x%x\n", risc);
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printk(KERN_WARNING "\nread cdt loc=0x%x\n", risc);
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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@@ -741,31 +745,32 @@ void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev,
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printk(KERN_WARNING "\n\n");
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printk(KERN_WARNING "\n\n");
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value = cx_read(CLK_RST);
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value = cx_read(CLK_RST);
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- CX25821_INFO(" CLK_RST = 0x%x \n\n", value);
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+ CX25821_INFO(" CLK_RST = 0x%x\n\n", value);
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value = cx_read(PLL_A_POST_STAT_BIST);
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value = cx_read(PLL_A_POST_STAT_BIST);
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- CX25821_INFO(" PLL_A_POST_STAT_BIST = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_A_POST_STAT_BIST = 0x%x\n\n", value);
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value = cx_read(PLL_A_INT_FRAC);
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value = cx_read(PLL_A_INT_FRAC);
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- CX25821_INFO(" PLL_A_INT_FRAC = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_A_INT_FRAC = 0x%x\n\n", value);
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value = cx_read(PLL_B_POST_STAT_BIST);
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value = cx_read(PLL_B_POST_STAT_BIST);
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- CX25821_INFO(" PLL_B_POST_STAT_BIST = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_B_POST_STAT_BIST = 0x%x\n\n", value);
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value = cx_read(PLL_B_INT_FRAC);
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value = cx_read(PLL_B_INT_FRAC);
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- CX25821_INFO(" PLL_B_INT_FRAC = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_B_INT_FRAC = 0x%x\n\n", value);
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value = cx_read(PLL_C_POST_STAT_BIST);
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value = cx_read(PLL_C_POST_STAT_BIST);
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- CX25821_INFO(" PLL_C_POST_STAT_BIST = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_C_POST_STAT_BIST = 0x%x\n\n", value);
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value = cx_read(PLL_C_INT_FRAC);
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value = cx_read(PLL_C_INT_FRAC);
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- CX25821_INFO(" PLL_C_INT_FRAC = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_C_INT_FRAC = 0x%x\n\n", value);
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value = cx_read(PLL_D_POST_STAT_BIST);
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value = cx_read(PLL_D_POST_STAT_BIST);
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- CX25821_INFO(" PLL_D_POST_STAT_BIST = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_D_POST_STAT_BIST = 0x%x\n\n", value);
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value = cx_read(PLL_D_INT_FRAC);
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value = cx_read(PLL_D_INT_FRAC);
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- CX25821_INFO(" PLL_D_INT_FRAC = 0x%x \n\n", value);
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+ CX25821_INFO(" PLL_D_INT_FRAC = 0x%x\n\n", value);
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value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp);
|
|
value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp);
|
|
- CX25821_INFO(" AFE_AB_DIAG_CTRL (0x10900090) = 0x%x \n\n", value);
|
|
|
|
|
|
+ CX25821_INFO(" AFE_AB_DIAG_CTRL (0x10900090) = 0x%x\n\n", value);
|
|
}
|
|
}
|
|
|
|
+EXPORT_SYMBOL(cx25821_sram_channel_dump_audio);
|
|
|
|
|
|
static void cx25821_shutdown(struct cx25821_dev *dev)
|
|
static void cx25821_shutdown(struct cx25821_dev *dev)
|
|
{
|
|
{
|
|
@@ -835,8 +840,8 @@ static void cx25821_initialize(struct cx25821_dev *dev)
|
|
cx_write(AUD_E_INT_STAT, 0xffffffff);
|
|
cx_write(AUD_E_INT_STAT, 0xffffffff);
|
|
|
|
|
|
cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000);
|
|
cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000);
|
|
- cx_write(PAD_CTRL, 0x12); //for I2C
|
|
|
|
- cx25821_registers_init(dev); //init Pecos registers
|
|
|
|
|
|
+ cx_write(PAD_CTRL, 0x12); /* for I2C */
|
|
|
|
+ cx25821_registers_init(dev); /* init Pecos registers */
|
|
mdelay(100);
|
|
mdelay(100);
|
|
|
|
|
|
for (i = 0; i < VID_CHANNEL_NUM; i++) {
|
|
for (i = 0; i < VID_CHANNEL_NUM; i++) {
|
|
@@ -847,7 +852,7 @@ static void cx25821_initialize(struct cx25821_dev *dev)
|
|
dev->use_cif_resolution[i] = FALSE;
|
|
dev->use_cif_resolution[i] = FALSE;
|
|
}
|
|
}
|
|
|
|
|
|
- //Probably only affect Downstream
|
|
|
|
|
|
+ /* Probably only affect Downstream */
|
|
for (i = VID_UPSTREAM_SRAM_CHANNEL_I; i <= VID_UPSTREAM_SRAM_CHANNEL_J;
|
|
for (i = VID_UPSTREAM_SRAM_CHANNEL_I; i <= VID_UPSTREAM_SRAM_CHANNEL_J;
|
|
i++) {
|
|
i++) {
|
|
cx25821_set_vip_mode(dev, &dev->sram_channels[i]);
|
|
cx25821_set_vip_mode(dev, &dev->sram_channels[i]);
|
|
@@ -944,12 +949,11 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
|
|
dev->clk_freq = 28000000;
|
|
dev->clk_freq = 28000000;
|
|
dev->sram_channels = cx25821_sram_channels;
|
|
dev->sram_channels = cx25821_sram_channels;
|
|
|
|
|
|
- if (dev->nr > 1) {
|
|
|
|
|
|
+ if (dev->nr > 1)
|
|
CX25821_INFO("dev->nr > 1!");
|
|
CX25821_INFO("dev->nr > 1!");
|
|
- }
|
|
|
|
|
|
|
|
/* board config */
|
|
/* board config */
|
|
- dev->board = 1; //card[dev->nr];
|
|
|
|
|
|
+ dev->board = 1; /* card[dev->nr]; */
|
|
dev->_max_num_decoders = MAX_DECODERS;
|
|
dev->_max_num_decoders = MAX_DECODERS;
|
|
|
|
|
|
dev->pci_bus = dev->pci->bus->number;
|
|
dev->pci_bus = dev->pci->bus->number;
|
|
@@ -1007,8 +1011,8 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
|
|
cx25821_initialize(dev);
|
|
cx25821_initialize(dev);
|
|
|
|
|
|
cx25821_i2c_register(&dev->i2c_bus[0]);
|
|
cx25821_i2c_register(&dev->i2c_bus[0]);
|
|
-// cx25821_i2c_register(&dev->i2c_bus[1]);
|
|
|
|
-// cx25821_i2c_register(&dev->i2c_bus[2]);
|
|
|
|
|
|
+/* cx25821_i2c_register(&dev->i2c_bus[1]);
|
|
|
|
+ * cx25821_i2c_register(&dev->i2c_bus[2]); */
|
|
|
|
|
|
CX25821_INFO("i2c register! bus->i2c_rc = %d\n",
|
|
CX25821_INFO("i2c register! bus->i2c_rc = %d\n",
|
|
dev->i2c_bus[0].i2c_rc);
|
|
dev->i2c_bus[0].i2c_rc);
|
|
@@ -1026,7 +1030,7 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
|
|
|
|
|
|
for (i = VID_UPSTREAM_SRAM_CHANNEL_I;
|
|
for (i = VID_UPSTREAM_SRAM_CHANNEL_I;
|
|
i <= AUDIO_UPSTREAM_SRAM_CHANNEL_B; i++) {
|
|
i <= AUDIO_UPSTREAM_SRAM_CHANNEL_B; i++) {
|
|
- //Since we don't have template8 for Audio Downstream
|
|
|
|
|
|
+ /* Since we don't have template8 for Audio Downstream */
|
|
if (cx25821_video_register(dev, i, video_template[i - 1]) < 0) {
|
|
if (cx25821_video_register(dev, i, video_template[i - 1]) < 0) {
|
|
printk(KERN_ERR
|
|
printk(KERN_ERR
|
|
"%s() Failed to register analog video adapters for Upstream channel %d.\n",
|
|
"%s() Failed to register analog video adapters for Upstream channel %d.\n",
|
|
@@ -1034,7 +1038,7 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
- // register IOCTL device
|
|
|
|
|
|
+ /* register IOCTL device */
|
|
dev->ioctl_dev =
|
|
dev->ioctl_dev =
|
|
cx25821_vdev_init(dev, dev->pci, video_template[VIDEO_IOCTL_CH],
|
|
cx25821_vdev_init(dev, dev->pci, video_template[VIDEO_IOCTL_CH],
|
|
"video");
|
|
"video");
|
|
@@ -1112,6 +1116,7 @@ void cx25821_dev_unregister(struct cx25821_dev *dev)
|
|
cx25821_i2c_unregister(&dev->i2c_bus[0]);
|
|
cx25821_i2c_unregister(&dev->i2c_bus[0]);
|
|
cx25821_iounmap(dev);
|
|
cx25821_iounmap(dev);
|
|
}
|
|
}
|
|
|
|
+EXPORT_SYMBOL(cx25821_dev_unregister);
|
|
|
|
|
|
static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist,
|
|
static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist,
|
|
unsigned int offset, u32 sync_line,
|
|
unsigned int offset, u32 sync_line,
|
|
@@ -1122,9 +1127,8 @@ static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist,
|
|
unsigned int line, todo;
|
|
unsigned int line, todo;
|
|
|
|
|
|
/* sync instruction */
|
|
/* sync instruction */
|
|
- if (sync_line != NO_SYNC_LINE) {
|
|
|
|
|
|
+ if (sync_line != NO_SYNC_LINE)
|
|
*(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
|
|
*(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
|
|
- }
|
|
|
|
|
|
|
|
/* scan lines */
|
|
/* scan lines */
|
|
sg = sglist;
|
|
sg = sglist;
|
|
@@ -1299,7 +1303,8 @@ int cx25821_risc_databuffer_audio(struct pci_dev *pci,
|
|
instructions = 1 + (bpl * lines) / PAGE_SIZE + lines;
|
|
instructions = 1 + (bpl * lines) / PAGE_SIZE + lines;
|
|
instructions += 1;
|
|
instructions += 1;
|
|
|
|
|
|
- if ((rc = btcx_riscmem_alloc(pci, risc, instructions * 12)) < 0)
|
|
|
|
|
|
+ rc = btcx_riscmem_alloc(pci, risc, instructions * 12);
|
|
|
|
+ if (rc < 0)
|
|
return rc;
|
|
return rc;
|
|
|
|
|
|
/* write risc instructions */
|
|
/* write risc instructions */
|
|
@@ -1312,6 +1317,7 @@ int cx25821_risc_databuffer_audio(struct pci_dev *pci,
|
|
BUG_ON((risc->jmp - risc->cpu + 2) * sizeof(*risc->cpu) > risc->size);
|
|
BUG_ON((risc->jmp - risc->cpu + 2) * sizeof(*risc->cpu) > risc->size);
|
|
return 0;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
+EXPORT_SYMBOL(cx25821_risc_databuffer_audio);
|
|
|
|
|
|
int cx25821_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
|
|
int cx25821_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
|
|
u32 reg, u32 mask, u32 value)
|
|
u32 reg, u32 mask, u32 value)
|
|
@@ -1375,7 +1381,7 @@ static irqreturn_t cx25821_irq(int irq, void *dev_id)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
- out:
|
|
|
|
|
|
+out:
|
|
return IRQ_RETVAL(handled);
|
|
return IRQ_RETVAL(handled);
|
|
}
|
|
}
|
|
|
|
|
|
@@ -1399,12 +1405,14 @@ void cx25821_print_irqbits(char *name, char *tag, char **strings,
|
|
}
|
|
}
|
|
printk("\n");
|
|
printk("\n");
|
|
}
|
|
}
|
|
|
|
+EXPORT_SYMBOL(cx25821_print_irqbits);
|
|
|
|
|
|
struct cx25821_dev *cx25821_dev_get(struct pci_dev *pci)
|
|
struct cx25821_dev *cx25821_dev_get(struct pci_dev *pci)
|
|
{
|
|
{
|
|
struct cx25821_dev *dev = pci_get_drvdata(pci);
|
|
struct cx25821_dev *dev = pci_get_drvdata(pci);
|
|
return dev;
|
|
return dev;
|
|
}
|
|
}
|
|
|
|
+EXPORT_SYMBOL(cx25821_dev_get);
|
|
|
|
|
|
static int __devinit cx25821_initdev(struct pci_dev *pci_dev,
|
|
static int __devinit cx25821_initdev(struct pci_dev *pci_dev,
|
|
const struct pci_device_id *pci_id)
|
|
const struct pci_device_id *pci_id)
|
|
@@ -1430,7 +1438,7 @@ static int __devinit cx25821_initdev(struct pci_dev *pci_dev,
|
|
goto fail_unregister_device;
|
|
goto fail_unregister_device;
|
|
}
|
|
}
|
|
|
|
|
|
- printk(KERN_INFO "cx25821 Athena pci enable ! \n");
|
|
|
|
|
|
+ printk(KERN_INFO "cx25821 Athena pci enable !\n");
|
|
|
|
|
|
if (cx25821_dev_setup(dev) < 0) {
|
|
if (cx25821_dev_setup(dev) < 0) {
|
|
err = -EINVAL;
|
|
err = -EINVAL;
|
|
@@ -1464,14 +1472,14 @@ static int __devinit cx25821_initdev(struct pci_dev *pci_dev,
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
|
|
|
|
- fail_irq:
|
|
|
|
- printk(KERN_INFO "cx25821 cx25821_initdev() can't get IRQ ! \n");
|
|
|
|
|
|
+fail_irq:
|
|
|
|
+ printk(KERN_INFO "cx25821 cx25821_initdev() can't get IRQ !\n");
|
|
cx25821_dev_unregister(dev);
|
|
cx25821_dev_unregister(dev);
|
|
|
|
|
|
- fail_unregister_device:
|
|
|
|
|
|
+fail_unregister_device:
|
|
v4l2_device_unregister(&dev->v4l2_dev);
|
|
v4l2_device_unregister(&dev->v4l2_dev);
|
|
|
|
|
|
- fail_free:
|
|
|
|
|
|
+fail_free:
|
|
kfree(dev);
|
|
kfree(dev);
|
|
return err;
|
|
return err;
|
|
}
|
|
}
|
|
@@ -1536,16 +1544,6 @@ static void __exit cx25821_fini(void)
|
|
pci_unregister_driver(&cx25821_pci_driver);
|
|
pci_unregister_driver(&cx25821_pci_driver);
|
|
}
|
|
}
|
|
|
|
|
|
-EXPORT_SYMBOL(cx25821_devlist);
|
|
|
|
-EXPORT_SYMBOL(cx25821_sram_channels);
|
|
|
|
-EXPORT_SYMBOL(cx25821_print_irqbits);
|
|
|
|
-EXPORT_SYMBOL(cx25821_dev_get);
|
|
|
|
-EXPORT_SYMBOL(cx25821_dev_unregister);
|
|
|
|
-EXPORT_SYMBOL(cx25821_sram_channel_setup);
|
|
|
|
-EXPORT_SYMBOL(cx25821_sram_channel_dump);
|
|
|
|
-EXPORT_SYMBOL(cx25821_sram_channel_setup_audio);
|
|
|
|
-EXPORT_SYMBOL(cx25821_sram_channel_dump_audio);
|
|
|
|
-EXPORT_SYMBOL(cx25821_risc_databuffer_audio);
|
|
|
|
EXPORT_SYMBOL(cx25821_set_gpiopin_direction);
|
|
EXPORT_SYMBOL(cx25821_set_gpiopin_direction);
|
|
|
|
|
|
module_init(cx25821_init);
|
|
module_init(cx25821_init);
|