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@@ -473,16 +473,21 @@ nouveau_mem_gart_init(struct drm_device *dev)
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/* XXX: For now a dummy. More samples required, possibly even a card
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* Called from nouveau_perf.c */
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-void nv30_mem_timing_entry(struct drm_device *dev, struct nouveau_pm_tbl_header *hdr,
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- struct nouveau_pm_tbl_entry *e, uint8_t magic_number,
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- struct nouveau_pm_memtiming *timing) {
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+void nv30_mem_timing_entry(struct drm_device *dev,
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+ struct nouveau_pm_tbl_header *hdr,
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+ struct nouveau_pm_tbl_entry *e, uint8_t magic_number,
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+ struct nouveau_pm_memtiming *timing)
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+{
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- NV_DEBUG(dev,"Timing entry format unknown, please contact nouveau developers");
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+ NV_DEBUG(dev, "Timing entry format unknown, "
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+ "please contact nouveau developers");
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}
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-void nv40_mem_timing_entry(struct drm_device *dev, struct nouveau_pm_tbl_header *hdr,
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- struct nouveau_pm_tbl_entry *e, uint8_t magic_number,
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- struct nouveau_pm_memtiming *timing) {
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+void nv40_mem_timing_entry(struct drm_device *dev,
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+ struct nouveau_pm_tbl_header *hdr,
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+ struct nouveau_pm_tbl_entry *e, uint8_t magic_number,
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+ struct nouveau_pm_memtiming *timing)
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+{
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timing->reg_0 = (e->tRC << 24 | e->tRFC << 16 | e->tRAS << 8 | e->tRP);
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@@ -492,15 +497,19 @@ void nv40_mem_timing_entry(struct drm_device *dev, struct nouveau_pm_tbl_header
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1 << 16 |
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(e->tUNK_1 + 2 + magic_number) << 8 |
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(e->tCL + 2 - magic_number);
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- timing->reg_2 = (magic_number << 24 | e->tUNK_12 << 16 | e->tUNK_11 << 8 | e->tUNK_10);
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+ timing->reg_2 = magic_number << 24 | e->tUNK_12 << 16 |
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+ e->tUNK_11 << 8 | e->tUNK_10;
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timing->reg_2 |= 0x20200000;
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NV_DEBUG(dev, "Entry %d: 220: %08x %08x %08x\n", timing->id,
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- timing->reg_0, timing->reg_1,timing->reg_2);
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+ timing->reg_0, timing->reg_1, timing->reg_2);
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}
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-void nv50_mem_timing_entry(struct drm_device *dev, struct bit_entry *P, struct nouveau_pm_tbl_header *hdr,
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- struct nouveau_pm_tbl_entry *e, uint8_t magic_number,struct nouveau_pm_memtiming *timing) {
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+void nv50_mem_timing_entry(struct drm_device *dev, struct bit_entry *P,
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+ struct nouveau_pm_tbl_header *hdr,
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+ struct nouveau_pm_tbl_entry *e, uint8_t magic_number,
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+ struct nouveau_pm_memtiming *timing)
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+{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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uint8_t unk18 = 1,
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@@ -527,11 +536,11 @@ void nv50_mem_timing_entry(struct drm_device *dev, struct bit_entry *P, struct n
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timing->reg_1 = (e->tWR + unk19 + 1 + magic_number) << 24 |
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max(unk18, (u8) 1) << 16 |
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(e->tUNK_1 + unk19 + 1 + magic_number) << 8;
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- if (dev_priv->chipset == 0xa8) {
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+ if (dev_priv->chipset == 0xa8)
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timing->reg_1 |= (e->tCL - 1);
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- } else {
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+ else
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timing->reg_1 |= (e->tCL + 2 - magic_number);
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- }
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+
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timing->reg_2 = (e->tUNK_12 << 16 | e->tUNK_11 << 8 | e->tUNK_10);
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timing->reg_5 = (e->tRAS << 24 | e->tRC);
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@@ -539,19 +548,24 @@ void nv50_mem_timing_entry(struct drm_device *dev, struct bit_entry *P, struct n
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if (P->version == 1) {
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timing->reg_2 |= magic_number << 24;
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+
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timing->reg_3 = (0x14 + e->tCL) << 24 |
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- 0x16 << 16 |
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- (e->tCL - 1) << 8 |
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- (e->tCL - 1);
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- timing->reg_4 = (nv_rd32(dev,0x10022c) & 0xffff0000) | e->tUNK_13 << 8 | e->tUNK_13;
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+ 0x16 << 16 |
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+ (e->tCL - 1) << 8 |
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+ (e->tCL - 1);
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+
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+ timing->reg_4 = (nv_rd32(dev, 0x10022c) & 0xffff0000) |
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+ e->tUNK_13 << 8 | e->tUNK_13;
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+
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timing->reg_5 |= (e->tCL + 2) << 8;
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+
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timing->reg_7 = 0x4000202 | (e->tCL - 1) << 16;
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} else {
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timing->reg_2 |= (unk19 - 1) << 24;
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/* XXX: reg_10022c for recentish cards pretty much unknown*/
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timing->reg_3 = e->tCL - 1;
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timing->reg_4 = (unk20 << 24 | unk21 << 16 |
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- e->tUNK_13 << 8 | e->tUNK_13);
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+ e->tUNK_13 << 8 | e->tUNK_13);
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/* XXX: +6? */
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timing->reg_5 |= (unk19 + 6) << 8;
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@@ -569,13 +583,26 @@ void nv50_mem_timing_entry(struct drm_device *dev, struct bit_entry *P, struct n
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NV_DEBUG(dev, " 240: %08x\n", timing->reg_8);
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}
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-void nvc0_mem_timing_entry(struct drm_device *dev, struct nouveau_pm_tbl_header *hdr,
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- struct nouveau_pm_tbl_entry *e, struct nouveau_pm_memtiming *timing) {
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- timing->reg_0 = (e->tRC << 24 | (e->tRFC & 0x7f) << 17 | e->tRAS << 8 | e->tRP);
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- timing->reg_1 = (nv_rd32(dev,0x10f294) & 0xff000000) | (e->tUNK_11&0x0f) << 20 | (e->tUNK_19 << 7) | (e->tCL & 0x0f);
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- timing->reg_2 = (nv_rd32(dev,0x10f298) & 0xff0000ff) | e->tWR << 16 | e->tUNK_1 << 8;
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+void nvc0_mem_timing_entry(struct drm_device *dev,
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+ struct nouveau_pm_tbl_header *hdr,
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+ struct nouveau_pm_tbl_entry *e,
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+ struct nouveau_pm_memtiming *timing)
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+{
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+ timing->reg_0 = (e->tRC << 24 | (e->tRFC & 0x7f) << 17 |
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+ e->tRAS << 8 | e->tRP);
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+
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+ timing->reg_1 = (nv_rd32(dev, 0x10f294) & 0xff000000) |
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+ (e->tUNK_11&0x0f) << 20 | (e->tUNK_19 << 7) |
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+ (e->tCL & 0x0f);
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+
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+ timing->reg_2 = (nv_rd32(dev, 0x10f298) & 0xff0000ff) |
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+ e->tWR << 16 | e->tUNK_1 << 8;
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+
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timing->reg_3 = e->tUNK_20 << 9 | e->tUNK_13;
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- timing->reg_4 = (nv_rd32(dev,0x10f2a0) & 0xfff000ff) | e->tUNK_12 << 15;
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+
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+ timing->reg_4 = (nv_rd32(dev, 0x10f2a0) & 0xfff000ff) |
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+ e->tUNK_12 << 15;
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+
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NV_DEBUG(dev, "Entry %d: 290: %08x %08x %08x %08x\n", timing->id,
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timing->reg_0, timing->reg_1,
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timing->reg_2, timing->reg_3);
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@@ -607,13 +634,13 @@ nouveau_mem_timing_init(struct drm_device *dev)
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return;
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if (P.version == 1)
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- hdr = (struct nouveau_pm_tbl_header *) ROMPTR(dev, P.data[4]);
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+ hdr = (struct nouveau_pm_tbl_header *) ROMPTR(dev,
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+ P.data[4]);
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+ else if (P.version == 2)
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+ hdr = (struct nouveau_pm_tbl_header *) ROMPTR(dev,
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+ P.data[8]);
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else
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- if (P.version == 2)
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- hdr = (struct nouveau_pm_tbl_header *) ROMPTR(dev, P.data[8]);
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- else {
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NV_WARN(dev, "unknown mem for BIT P %d\n", P.version);
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- }
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} else {
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NV_DEBUG(dev, "BMP version too old for memory\n");
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return;
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@@ -625,32 +652,35 @@ nouveau_mem_timing_init(struct drm_device *dev)
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}
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if (hdr->version != 0x10) {
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- NV_WARN(dev, "memory timing table 0x%02x unknown\n", hdr->version);
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+ NV_WARN(dev, "memory timing table 0x%02x unknown\n",
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+ hdr->version);
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return;
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}
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/* validate record length */
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if (hdr->entry_len < 15) {
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- NV_ERROR(dev, "mem timing table length unknown: %d\n", hdr->entry_len);
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+ NV_ERROR(dev, "mem timing table length unknown: %d\n",
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+ hdr->entry_len);
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return;
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}
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/* parse vbios entries into common format */
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- memtimings->timing =
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- kcalloc(hdr->entry_cnt, sizeof(*memtimings->timing), GFP_KERNEL);
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+ memtimings->timing = kcalloc(hdr->entry_cnt,
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+ sizeof(*memtimings->timing), GFP_KERNEL);
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if (!memtimings->timing)
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return;
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/* Get "some number" from the timing reg for NV_40 and NV_50
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* Used in calculations later... source unknown */
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magic_number = 0;
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- if (P.version == 1) {
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+ if (P.version == 1)
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magic_number = (nv_rd32(dev, 0x100228) & 0x0f000000) >> 24;
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- }
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- entry = (u8*) hdr + hdr->header_len;
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+ entry = (u8 *) hdr + hdr->header_len;
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for (i = 0; i < hdr->entry_cnt; i++, entry += hdr->entry_len) {
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struct nouveau_pm_memtiming *timing = &pm->memtimings.timing[i];
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+ struct nouveau_pm_tbl_entry *entry_struct =
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+ (struct nouveau_pm_tbl_entry *) entry;
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if (entry[0] == 0)
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continue;
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@@ -658,17 +688,22 @@ nouveau_mem_timing_init(struct drm_device *dev)
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timing->WR = entry[0];
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timing->CL = entry[2];
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- if(dev_priv->card_type <= NV_40) {
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- nv40_mem_timing_entry(dev,hdr,(struct nouveau_pm_tbl_entry*) entry,magic_number,&pm->memtimings.timing[i]);
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- } else if(dev_priv->card_type == NV_50){
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- nv50_mem_timing_entry(dev,&P,hdr,(struct nouveau_pm_tbl_entry*) entry,magic_number,&pm->memtimings.timing[i]);
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- } else if(dev_priv->card_type == NV_C0) {
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- nvc0_mem_timing_entry(dev,hdr,(struct nouveau_pm_tbl_entry*) entry,&pm->memtimings.timing[i]);
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+ if (dev_priv->card_type <= NV_40) {
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+ nv40_mem_timing_entry(dev, hdr, entry_struct,
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+ magic_number,
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+ &pm->memtimings.timing[i]);
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+ } else if (dev_priv->card_type == NV_50) {
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+ nv50_mem_timing_entry(dev, &P, hdr, entry_struct,
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+ magic_number,
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+ &pm->memtimings.timing[i]);
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+ } else if (dev_priv->card_type == NV_C0) {
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+ nvc0_mem_timing_entry(dev, hdr, entry_struct,
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+ &pm->memtimings.timing[i]);
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}
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}
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memtimings->nr_timing = hdr->entry_cnt;
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- memtimings->supported = P.version == 1;
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+ memtimings->supported = (P.version == 1);
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}
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void
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@@ -677,10 +712,8 @@ nouveau_mem_timing_fini(struct drm_device *dev)
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_pm_memtimings *mem = &dev_priv->engine.pm.memtimings;
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- if(mem->timing) {
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- kfree(mem->timing);
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- mem->timing = NULL;
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- }
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+ kfree(mem->timing);
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+ mem->timing = NULL;
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}
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int
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