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@@ -0,0 +1,525 @@
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+/*
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+ * linux/kernel/irq/chip.c
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+ *
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+ * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
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+ * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
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+ *
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+ * This file contains the core interrupt handling code, for irq-chip
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+ * based architectures.
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+ *
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+ * Detailed information is available in Documentation/DocBook/genericirq
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+ */
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+
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+#include <linux/irq.h>
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+#include <linux/module.h>
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+#include <linux/interrupt.h>
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+#include <linux/kernel_stat.h>
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+
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+#include "internals.h"
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+
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+/**
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+ * set_irq_chip - set the irq chip for an irq
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+ * @irq: irq number
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+ * @chip: pointer to irq chip description structure
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+ */
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+int set_irq_chip(unsigned int irq, struct irq_chip *chip)
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+{
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+ struct irq_desc *desc;
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+ unsigned long flags;
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+
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+ if (irq >= NR_IRQS) {
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+ printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
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+ WARN_ON(1);
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+ return -EINVAL;
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+ }
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+
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+ if (!chip)
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+ chip = &no_irq_chip;
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+
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+ desc = irq_desc + irq;
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+ spin_lock_irqsave(&desc->lock, flags);
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+ irq_chip_set_defaults(chip);
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+ desc->chip = chip;
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+ /*
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+ * For compatibility only:
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+ */
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+ desc->chip = chip;
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+ spin_unlock_irqrestore(&desc->lock, flags);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL(set_irq_chip);
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+
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+/**
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+ * set_irq_type - set the irq type for an irq
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+ * @irq: irq number
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+ * @type: interrupt type - see include/linux/interrupt.h
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+ */
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+int set_irq_type(unsigned int irq, unsigned int type)
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+{
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+ struct irq_desc *desc;
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+ unsigned long flags;
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+ int ret = -ENXIO;
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+
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+ if (irq >= NR_IRQS) {
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+ printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
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+ return -ENODEV;
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+ }
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+
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+ desc = irq_desc + irq;
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+ if (desc->chip->set_type) {
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+ spin_lock_irqsave(&desc->lock, flags);
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+ ret = desc->chip->set_type(irq, type);
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+ spin_unlock_irqrestore(&desc->lock, flags);
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+ }
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+ return ret;
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+}
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+EXPORT_SYMBOL(set_irq_type);
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+
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+/**
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+ * set_irq_data - set irq type data for an irq
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+ * @irq: Interrupt number
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+ * @data: Pointer to interrupt specific data
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+ *
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+ * Set the hardware irq controller data for an irq
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+ */
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+int set_irq_data(unsigned int irq, void *data)
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+{
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+ struct irq_desc *desc;
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+ unsigned long flags;
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+
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+ if (irq >= NR_IRQS) {
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+ printk(KERN_ERR
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+ "Trying to install controller data for IRQ%d\n", irq);
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+ return -EINVAL;
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+ }
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+
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+ desc = irq_desc + irq;
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+ spin_lock_irqsave(&desc->lock, flags);
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+ desc->handler_data = data;
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+ spin_unlock_irqrestore(&desc->lock, flags);
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+ return 0;
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+}
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+EXPORT_SYMBOL(set_irq_data);
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+
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+/**
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+ * set_irq_chip_data - set irq chip data for an irq
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+ * @irq: Interrupt number
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+ * @data: Pointer to chip specific data
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+ *
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+ * Set the hardware irq chip data for an irq
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+ */
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+int set_irq_chip_data(unsigned int irq, void *data)
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+{
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+ struct irq_desc *desc = irq_desc + irq;
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+ unsigned long flags;
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+
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+ if (irq >= NR_IRQS || !desc->chip) {
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+ printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
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+ return -EINVAL;
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+ }
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+
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+ spin_lock_irqsave(&desc->lock, flags);
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+ desc->chip_data = data;
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+ spin_unlock_irqrestore(&desc->lock, flags);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL(set_irq_chip_data);
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+
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+/*
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+ * default enable function
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+ */
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+static void default_enable(unsigned int irq)
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+{
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+ struct irq_desc *desc = irq_desc + irq;
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+
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+ desc->chip->unmask(irq);
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+ desc->status &= ~IRQ_MASKED;
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+}
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+
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+/*
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+ * default disable function
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+ */
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+static void default_disable(unsigned int irq)
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+{
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+ struct irq_desc *desc = irq_desc + irq;
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+
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+ if (!(desc->status & IRQ_DELAYED_DISABLE))
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+ irq_desc[irq].chip->mask(irq);
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+}
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+
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+/*
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+ * default startup function
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+ */
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+static unsigned int default_startup(unsigned int irq)
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+{
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+ irq_desc[irq].chip->enable(irq);
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+
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+ return 0;
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+}
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+
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+/*
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+ * Fixup enable/disable function pointers
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+ */
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+void irq_chip_set_defaults(struct irq_chip *chip)
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+{
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+ if (!chip->enable)
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+ chip->enable = default_enable;
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+ if (!chip->disable)
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+ chip->disable = default_disable;
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+ if (!chip->startup)
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+ chip->startup = default_startup;
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+ if (!chip->shutdown)
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+ chip->shutdown = chip->disable;
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+ if (!chip->name)
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+ chip->name = chip->typename;
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+}
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+
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+static inline void mask_ack_irq(struct irq_desc *desc, int irq)
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+{
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+ if (desc->chip->mask_ack)
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+ desc->chip->mask_ack(irq);
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+ else {
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+ desc->chip->mask(irq);
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+ desc->chip->ack(irq);
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+ }
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+}
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+
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+/**
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+ * handle_simple_irq - Simple and software-decoded IRQs.
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+ * @irq: the interrupt number
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+ * @desc: the interrupt description structure for this irq
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+ * @regs: pointer to a register structure
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+ *
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+ * Simple interrupts are either sent from a demultiplexing interrupt
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+ * handler or come from hardware, where no interrupt hardware control
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+ * is necessary.
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+ *
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+ * Note: The caller is expected to handle the ack, clear, mask and
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+ * unmask issues if necessary.
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+ */
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+void fastcall
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+handle_simple_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
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+{
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+ struct irqaction *action;
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+ irqreturn_t action_ret;
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+ const unsigned int cpu = smp_processor_id();
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+
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+ spin_lock(&desc->lock);
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+
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+ if (unlikely(desc->status & IRQ_INPROGRESS))
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+ goto out_unlock;
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+ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
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+ kstat_cpu(cpu).irqs[irq]++;
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+
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+ action = desc->action;
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+ if (unlikely(!action || (desc->status & IRQ_DISABLED)))
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+ goto out_unlock;
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+
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+ desc->status |= IRQ_INPROGRESS;
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+ spin_unlock(&desc->lock);
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+
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+ action_ret = handle_IRQ_event(irq, regs, action);
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+ if (!noirqdebug)
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+ note_interrupt(irq, desc, action_ret, regs);
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+
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+ spin_lock(&desc->lock);
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+ desc->status &= ~IRQ_INPROGRESS;
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+out_unlock:
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+ spin_unlock(&desc->lock);
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+}
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+
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+/**
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+ * handle_level_irq - Level type irq handler
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+ * @irq: the interrupt number
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+ * @desc: the interrupt description structure for this irq
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+ * @regs: pointer to a register structure
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+ *
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+ * Level type interrupts are active as long as the hardware line has
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+ * the active level. This may require to mask the interrupt and unmask
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+ * it after the associated handler has acknowledged the device, so the
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+ * interrupt line is back to inactive.
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+ */
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+void fastcall
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+handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
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+{
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+ unsigned int cpu = smp_processor_id();
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+ struct irqaction *action;
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+ irqreturn_t action_ret;
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+
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+ spin_lock(&desc->lock);
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+ mask_ack_irq(desc, irq);
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+
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+ if (unlikely(desc->status & IRQ_INPROGRESS))
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+ goto out;
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+ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
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+ kstat_cpu(cpu).irqs[irq]++;
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+
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+ /*
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+ * If its disabled or no action available
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+ * keep it masked and get out of here
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+ */
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+ action = desc->action;
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+ if (unlikely(!action || (desc->status & IRQ_DISABLED)))
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+ goto out;
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+
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+ desc->status |= IRQ_INPROGRESS;
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+ spin_unlock(&desc->lock);
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+
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+ action_ret = handle_IRQ_event(irq, regs, action);
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+ if (!noirqdebug)
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+ note_interrupt(irq, desc, action_ret, regs);
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+
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+ spin_lock(&desc->lock);
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+ desc->status &= ~IRQ_INPROGRESS;
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+out:
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+ if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
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+ desc->chip->unmask(irq);
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+ spin_unlock(&desc->lock);
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+}
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+
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+/**
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+ * handle_fastack_irq - irq handler for transparent controllers
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+ * @irq: the interrupt number
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+ * @desc: the interrupt description structure for this irq
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+ * @regs: pointer to a register structure
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+ *
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+ * Only a single callback will be issued to the chip: an ->ack()
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+ * call when the interrupt has been serviced. This enables support
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+ * for modern forms of interrupt handlers, which handle the flow
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+ * details in hardware, transparently.
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+ */
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+void fastcall
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+handle_fastack_irq(unsigned int irq, struct irq_desc *desc,
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+ struct pt_regs *regs)
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+{
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+ unsigned int cpu = smp_processor_id();
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+ struct irqaction *action;
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+ irqreturn_t action_ret;
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+
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+ spin_lock(&desc->lock);
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+
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+ if (unlikely(desc->status & IRQ_INPROGRESS))
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+ goto out;
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+
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+ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
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+ kstat_cpu(cpu).irqs[irq]++;
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+
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+ /*
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+ * If its disabled or no action available
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+ * keep it masked and get out of here
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+ */
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+ action = desc->action;
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+ if (unlikely(!action || (desc->status & IRQ_DISABLED)))
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+ goto out;
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+
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+ desc->status |= IRQ_INPROGRESS;
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+ spin_unlock(&desc->lock);
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+
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+ action_ret = handle_IRQ_event(irq, regs, action);
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+ if (!noirqdebug)
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+ note_interrupt(irq, desc, action_ret, regs);
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+
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+ spin_lock(&desc->lock);
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+ desc->status &= ~IRQ_INPROGRESS;
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+out:
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+ if (!(desc->status & IRQ_DISABLED))
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+ desc->chip->ack(irq);
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+ else
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+ desc->chip->mask(irq);
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+
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+ spin_unlock(&desc->lock);
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+}
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+
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+/**
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+ * handle_edge_irq - edge type IRQ handler
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+ * @irq: the interrupt number
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+ * @desc: the interrupt description structure for this irq
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+ * @regs: pointer to a register structure
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+ *
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+ * Interrupt occures on the falling and/or rising edge of a hardware
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+ * signal. The occurence is latched into the irq controller hardware
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+ * and must be acked in order to be reenabled. After the ack another
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+ * interrupt can happen on the same source even before the first one
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+ * is handled by the assosiacted event handler. If this happens it
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+ * might be necessary to disable (mask) the interrupt depending on the
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+ * controller hardware. This requires to reenable the interrupt inside
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+ * of the loop which handles the interrupts which have arrived while
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+ * the handler was running. If all pending interrupts are handled, the
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+ * loop is left.
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+ */
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+void fastcall
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+handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
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+{
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+ const unsigned int cpu = smp_processor_id();
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+
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+ spin_lock(&desc->lock);
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+
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+ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
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+
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+ /*
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+ * If we're currently running this IRQ, or its disabled,
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+ * we shouldn't process the IRQ. Mark it pending, handle
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+ * the necessary masking and go out
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+ */
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+ if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
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+ !desc->action)) {
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+ desc->status |= (IRQ_PENDING | IRQ_MASKED);
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+ mask_ack_irq(desc, irq);
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+ goto out_unlock;
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+ }
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+
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+ kstat_cpu(cpu).irqs[irq]++;
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+
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+ /* Start handling the irq */
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+ desc->chip->ack(irq);
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+
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+ /* Mark the IRQ currently in progress.*/
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+ desc->status |= IRQ_INPROGRESS;
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+
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+ do {
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+ struct irqaction *action = desc->action;
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+ irqreturn_t action_ret;
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+
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+ if (unlikely(!action)) {
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+ desc->chip->mask(irq);
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+ goto out_unlock;
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+ }
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+
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+ /*
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+ * When another irq arrived while we were handling
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+ * one, we could have masked the irq.
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+ * Renable it, if it was not disabled in meantime.
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+ */
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+ if (unlikely((desc->status &
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+ (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
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+ (IRQ_PENDING | IRQ_MASKED))) {
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+ desc->chip->unmask(irq);
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+ desc->status &= ~IRQ_MASKED;
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+ }
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+
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+ desc->status &= ~IRQ_PENDING;
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+ spin_unlock(&desc->lock);
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+ action_ret = handle_IRQ_event(irq, regs, action);
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+ if (!noirqdebug)
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+ note_interrupt(irq, desc, action_ret, regs);
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+ spin_lock(&desc->lock);
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+
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+ } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
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+
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+ desc->status &= ~IRQ_INPROGRESS;
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+out_unlock:
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+ spin_unlock(&desc->lock);
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+}
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+
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+#ifdef CONFIG_SMP
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+/**
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+ * handle_percpu_IRQ - Per CPU local irq handler
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+ * @irq: the interrupt number
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+ * @desc: the interrupt description structure for this irq
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+ * @regs: pointer to a register structure
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+ *
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+ * Per CPU interrupts on SMP machines without locking requirements
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+ */
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+void fastcall
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+handle_percpu_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
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|
|
+{
|
|
|
+ irqreturn_t action_ret;
|
|
|
+
|
|
|
+ kstat_this_cpu.irqs[irq]++;
|
|
|
+
|
|
|
+ if (desc->chip->ack)
|
|
|
+ desc->chip->ack(irq);
|
|
|
+
|
|
|
+ action_ret = handle_IRQ_event(irq, regs, desc->action);
|
|
|
+ if (!noirqdebug)
|
|
|
+ note_interrupt(irq, desc, action_ret, regs);
|
|
|
+
|
|
|
+ if (desc->chip->eoi)
|
|
|
+ desc->chip->eoi(irq);
|
|
|
+}
|
|
|
+
|
|
|
+#endif /* CONFIG_SMP */
|
|
|
+
|
|
|
+void
|
|
|
+__set_irq_handler(unsigned int irq,
|
|
|
+ void fastcall (*handle)(unsigned int, irq_desc_t *,
|
|
|
+ struct pt_regs *),
|
|
|
+ int is_chained)
|
|
|
+{
|
|
|
+ struct irq_desc *desc;
|
|
|
+ unsigned long flags;
|
|
|
+
|
|
|
+ if (irq >= NR_IRQS) {
|
|
|
+ printk(KERN_ERR
|
|
|
+ "Trying to install type control for IRQ%d\n", irq);
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ desc = irq_desc + irq;
|
|
|
+
|
|
|
+ if (!handle)
|
|
|
+ handle = handle_bad_irq;
|
|
|
+
|
|
|
+ if (is_chained && desc->chip == &no_irq_chip)
|
|
|
+ printk(KERN_WARNING "Trying to install "
|
|
|
+ "chained interrupt type for IRQ%d\n", irq);
|
|
|
+
|
|
|
+ spin_lock_irqsave(&desc->lock, flags);
|
|
|
+
|
|
|
+ /* Uninstall? */
|
|
|
+ if (handle == handle_bad_irq) {
|
|
|
+ if (desc->chip != &no_irq_chip) {
|
|
|
+ desc->chip->mask(irq);
|
|
|
+ desc->chip->ack(irq);
|
|
|
+ }
|
|
|
+ desc->status |= IRQ_DISABLED;
|
|
|
+ desc->depth = 1;
|
|
|
+ }
|
|
|
+ desc->handle_irq = handle;
|
|
|
+
|
|
|
+ if (handle != handle_bad_irq && is_chained) {
|
|
|
+ desc->status &= ~IRQ_DISABLED;
|
|
|
+ desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
|
|
|
+ desc->depth = 0;
|
|
|
+ desc->chip->unmask(irq);
|
|
|
+ }
|
|
|
+ spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
+}
|
|
|
+
|
|
|
+void
|
|
|
+set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
|
|
|
+ void fastcall (*handle)(unsigned int,
|
|
|
+ struct irq_desc *,
|
|
|
+ struct pt_regs *))
|
|
|
+{
|
|
|
+ set_irq_chip(irq, chip);
|
|
|
+ __set_irq_handler(irq, handle, 0);
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Get a descriptive string for the highlevel handler, for
|
|
|
+ * /proc/interrupts output:
|
|
|
+ */
|
|
|
+const char *
|
|
|
+handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *,
|
|
|
+ struct pt_regs *))
|
|
|
+{
|
|
|
+ if (handle == handle_level_irq)
|
|
|
+ return "level ";
|
|
|
+ if (handle == handle_fastack_irq)
|
|
|
+ return "level ";
|
|
|
+ if (handle == handle_edge_irq)
|
|
|
+ return "edge ";
|
|
|
+ if (handle == handle_simple_irq)
|
|
|
+ return "simple";
|
|
|
+#ifdef CONFIG_SMP
|
|
|
+ if (handle == handle_percpu_irq)
|
|
|
+ return "percpu";
|
|
|
+#endif
|
|
|
+ if (handle == handle_bad_irq)
|
|
|
+ return "bad ";
|
|
|
+
|
|
|
+ return NULL;
|
|
|
+}
|