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@@ -501,6 +501,96 @@ int iwlagn_set_pan_params(struct iwl_priv *priv)
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return ret;
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}
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+static void _iwl_set_rxon_ht(struct iwl_priv *priv,
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+ struct iwl_ht_config *ht_conf,
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+ struct iwl_rxon_context *ctx)
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+{
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+ struct iwl_rxon_cmd *rxon = &ctx->staging;
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+
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+ if (!ctx->ht.enabled) {
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+ rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
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+ RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
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+ RXON_FLG_HT40_PROT_MSK |
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+ RXON_FLG_HT_PROT_MSK);
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+ return;
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+ }
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+
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+ /* FIXME: if the definition of ht.protection changed, the "translation"
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+ * will be needed for rxon->flags
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+ */
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+ rxon->flags |= cpu_to_le32(ctx->ht.protection <<
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+ RXON_FLG_HT_OPERATING_MODE_POS);
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+
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+ /* Set up channel bandwidth:
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+ * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
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+ /* clear the HT channel mode before set the mode */
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+ rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
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+ RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
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+ if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
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+ /* pure ht40 */
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+ if (ctx->ht.protection ==
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+ IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
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+ /*
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+ * Note: control channel is opposite of extension
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+ * channel
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+ */
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+ switch (ctx->ht.extension_chan_offset) {
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+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
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+ rxon->flags &=
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+ ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
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+ break;
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+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
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+ rxon->flags |=
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+ RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
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+ break;
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+ }
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+ } else {
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+ /*
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+ * Note: control channel is opposite of extension
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+ * channel
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+ */
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+ switch (ctx->ht.extension_chan_offset) {
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+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
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+ rxon->flags &=
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+ ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
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+ break;
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+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
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+ rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
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+ break;
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+ case IEEE80211_HT_PARAM_CHA_SEC_NONE:
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+ default:
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+ /*
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+ * channel location only valid if in Mixed
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+ * mode
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+ */
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+ IWL_ERR(priv,
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+ "invalid extension channel offset\n");
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+ break;
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+ }
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+ }
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+ } else {
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
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+ }
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+
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+ iwlagn_set_rxon_chain(priv, ctx);
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+
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+ IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
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+ "extension channel offset 0x%x\n",
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+ le32_to_cpu(rxon->flags), ctx->ht.protection,
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+ ctx->ht.extension_chan_offset);
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+}
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+
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+void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
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+{
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+ struct iwl_rxon_context *ctx;
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+
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+ for_each_context(priv, ctx)
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+ _iwl_set_rxon_ht(priv, ht_conf, ctx);
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+}
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+
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static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv,
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struct iwl_rxon_context *ctx, int hw_decrypt)
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{
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