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@@ -1677,6 +1677,8 @@ lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
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case MBX_RESUME_RPI:
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case MBX_READ_EVENT_LOG_STATUS:
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case MBX_READ_EVENT_LOG:
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+ case MBX_SECURITY_MGMT:
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+ case MBX_AUTH_PORT:
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ret = mbxCommand;
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break;
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default:
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@@ -1781,6 +1783,13 @@ lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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pmb->context2 = NULL;
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}
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+ /* Check security permission status on INIT_LINK mailbox command */
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+ if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
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+ (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
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+ lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
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+ "2860 SLI authentication is required "
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+ "for INIT_LINK but has not done yet\n");
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+
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if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
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lpfc_sli4_mbox_cmd_free(phba, pmb);
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else
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@@ -3658,11 +3667,15 @@ lpfc_sli_chipset_init(struct lpfc_hba *phba)
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i = 0;
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while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
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- /* Check every 100ms for 5 retries, then every 500ms for 5, then
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- * every 2.5 sec for 5, then reset board and every 2.5 sec for
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- * 4.
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+ /* Check every 10ms for 10 retries, then every 100ms for 90
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+ * retries, then every 1 sec for 50 retires for a total of
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+ * ~60 seconds before reset the board again and check every
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+ * 1 sec for 50 retries. The up to 60 seconds before the
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+ * board ready is required by the Falcon FIPS zeroization
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+ * complete, and any reset the board in between shall cause
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+ * restart of zeroization, further delay the board ready.
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*/
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- if (i++ >= 20) {
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+ if (i++ >= 200) {
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/* Adapter failed to init, timeout, status reg
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<status> */
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lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
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@@ -3690,16 +3703,15 @@ lpfc_sli_chipset_init(struct lpfc_hba *phba)
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return -EIO;
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}
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- if (i <= 5) {
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+ if (i <= 10)
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msleep(10);
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- } else if (i <= 10) {
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- msleep(500);
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- } else {
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- msleep(2500);
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- }
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+ else if (i <= 100)
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+ msleep(100);
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+ else
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+ msleep(1000);
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- if (i == 15) {
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- /* Do post */
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+ if (i == 150) {
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+ /* Do post */
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phba->pport->port_state = LPFC_VPORT_UNKNOWN;
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lpfc_sli_brdrestart(phba);
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}
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@@ -5950,6 +5962,8 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
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uint8_t command_type = ELS_COMMAND_NON_FIP;
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uint8_t cmnd;
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uint16_t xritag;
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+ uint16_t abrt_iotag;
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+ struct lpfc_iocbq *abrtiocbq;
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struct ulp_bde64 *bpl = NULL;
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uint32_t els_id = ELS_ID_DEFAULT;
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int numBdes, i;
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@@ -6162,9 +6176,17 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
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case CMD_ABORT_XRI_CX:
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/* words 0-2 memcpy should be 0 rserved */
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/* port will send abts */
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- if (iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
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+ abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
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+ if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
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+ abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
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+ fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
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+ } else
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+ fip = 0;
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+
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+ if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
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/*
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- * The link is down so the fw does not need to send abts
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+ * The link is down, or the command was ELS_FIP
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+ * so the fw does not need to send abts
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* on the wire.
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*/
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bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
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@@ -7895,7 +7917,7 @@ lpfc_sli_eratt_read(struct lpfc_hba *phba)
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/* Check if there is a deferred error condition is active */
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if ((HS_FFER1 & phba->work_hs) &&
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((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
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- HS_FFER6 | HS_FFER7) & phba->work_hs)) {
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+ HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
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phba->hba_flag |= DEFER_ERATT;
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/* Clear all interrupt enable conditions */
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writel(0, phba->HCregaddr);
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@@ -8211,7 +8233,8 @@ lpfc_sli_sp_intr_handler(int irq, void *dev_id)
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*/
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if ((HS_FFER1 & phba->work_hs) &&
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((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
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- HS_FFER6 | HS_FFER7) & phba->work_hs)) {
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+ HS_FFER6 | HS_FFER7 | HS_FFER8) &
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+ phba->work_hs)) {
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phba->hba_flag |= DEFER_ERATT;
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/* Clear all interrupt enable conditions */
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writel(0, phba->HCregaddr);
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