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@@ -121,6 +121,13 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
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if (reg == SDHCI_HOST_CONTROL) {
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u32 dma_bits;
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+ /*
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+ * If host control register is not standard, exit
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+ * this function
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+ */
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+ if (host->quirks2 & SDHCI_QUIRK2_BROKEN_HOST_CONTROL)
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+ return;
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+
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/* DMA select is 22,23 bits in Protocol Control Register */
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dma_bits = (val & SDHCI_CTRL_DMA_MASK) << 5;
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clrsetbits_be32(host->ioaddr + reg , SDHCI_CTRL_DMA_MASK << 5,
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@@ -289,6 +296,7 @@ static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {
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static int sdhci_esdhc_probe(struct platform_device *pdev)
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{
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struct sdhci_host *host;
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+ struct device_node *np;
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int ret;
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host = sdhci_pltfm_init(pdev, &sdhci_esdhc_pdata, 0);
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@@ -297,6 +305,15 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
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sdhci_get_of_property(pdev);
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+ np = pdev->dev.of_node;
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+ if (of_device_is_compatible(np, "fsl,p2020-esdhc")) {
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+ /*
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+ * Freescale messed up with P2020 as it has a non-standard
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+ * host control register
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+ */
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+ host->quirks2 |= SDHCI_QUIRK2_BROKEN_HOST_CONTROL;
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+ }
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+
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/* call to generic mmc_of_parse to support additional capabilities */
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mmc_of_parse(host->mmc);
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