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@@ -1042,17 +1042,26 @@ static void tg3_frob_aux_power(struct tg3 *tp)
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udelay(100);
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} else {
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u32 no_gpio2;
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- u32 grc_local_ctrl;
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+ u32 grc_local_ctrl = 0;
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if (tp_peer != tp &&
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(tp_peer->tg3_flags & TG3_FLAG_INIT_COMPLETE) != 0)
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return;
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+ /* Workaround to prevent overdrawing Amps. */
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+ if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
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+ ASIC_REV_5714) {
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+ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
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+ tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl |
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+ grc_local_ctrl);
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+ udelay(100);
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+ }
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+
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/* On 5753 and variants, GPIO2 cannot be used. */
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no_gpio2 = tp->nic_sram_data_cfg &
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NIC_SRAM_DATA_CFG_NO_GPIO2;
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- grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 |
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+ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE0 |
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GRC_LCLCTRL_GPIO_OE1 |
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GRC_LCLCTRL_GPIO_OE2 |
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GRC_LCLCTRL_GPIO_OUTPUT1 |
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@@ -1297,7 +1306,8 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
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tg3_writephy(tp, MII_TG3_EXT_CTRL,
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MII_TG3_EXT_CTRL_FORCE_LED_OFF);
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tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x01b2);
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- tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
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+ if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700)
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+ tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
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}
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}
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