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@@ -25,6 +25,9 @@
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#include <linux/irqdomain.h>
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#include <linux/slab.h>
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#include <linux/pinctrl/pinctrl.h>
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+#include <linux/pinctrl/pinmux.h>
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+/* Since we request GPIOs from ourself */
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+#include <linux/pinctrl/consumer.h>
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#include <asm/mach/irq.h>
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@@ -873,6 +876,25 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
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}
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/* I/O Functions */
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+
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+static int nmk_gpio_request(struct gpio_chip *chip, unsigned offset)
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+{
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+ /*
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+ * Map back to global GPIO space and request muxing, the direction
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+ * parameter does not matter for this controller.
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+ */
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+ int gpio = chip->base + offset;
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+
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+ return pinctrl_request_gpio(gpio);
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+}
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+
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+static void nmk_gpio_free(struct gpio_chip *chip, unsigned offset)
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+{
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+ int gpio = chip->base + offset;
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+
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+ pinctrl_free_gpio(gpio);
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+}
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+
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static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
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{
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struct nmk_gpio_chip *nmk_chip =
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@@ -1023,6 +1045,8 @@ static inline void nmk_gpio_dbg_show_one(struct seq_file *s,
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/* This structure is replicated for each GPIO block allocated at probe time */
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static struct gpio_chip nmk_gpio_template = {
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+ .request = nmk_gpio_request,
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+ .free = nmk_gpio_free,
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.direction_input = nmk_gpio_make_input,
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.get = nmk_gpio_get_input,
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.direction_output = nmk_gpio_make_output,
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@@ -1365,9 +1389,189 @@ static struct pinctrl_ops nmk_pinctrl_ops = {
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.pin_dbg_show = nmk_pin_dbg_show,
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};
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+static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
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+{
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+ struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
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+
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+ return npct->soc->nfunctions;
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+}
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+
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+static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev,
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+ unsigned function)
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+{
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+ struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
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+
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+ return npct->soc->functions[function].name;
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+}
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+
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+static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
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+ unsigned function,
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+ const char * const **groups,
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+ unsigned * const num_groups)
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+{
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+ struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
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+
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+ *groups = npct->soc->functions[function].groups;
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+ *num_groups = npct->soc->functions[function].ngroups;
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+
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+ return 0;
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+}
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+
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+static int nmk_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,
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+ unsigned group)
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+{
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+ struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
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+ const struct nmk_pingroup *g;
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+ static unsigned int slpm[NUM_BANKS];
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+ unsigned long flags;
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+ bool glitch;
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+ int ret = -EINVAL;
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+ int i;
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+
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+ g = &npct->soc->groups[group];
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+
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+ if (g->altsetting < 0)
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+ return -EINVAL;
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+
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+ dev_dbg(npct->dev, "enable group %s, %u pins\n", g->name, g->npins);
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+
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+ /* Handle this special glitch on altfunction C */
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+ glitch = (g->altsetting == NMK_GPIO_ALT_C);
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+
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+ if (glitch) {
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+ spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
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+
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+ /* Initially don't put any pins to sleep when switching */
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+ memset(slpm, 0xff, sizeof(slpm));
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+
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+ /*
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+ * Then mask the pins that need to be sleeping now when we're
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+ * switching to the ALT C function.
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+ */
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+ for (i = 0; i < g->npins; i++)
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+ slpm[g->pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->pins[i]);
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+ nmk_gpio_glitch_slpm_init(slpm);
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+ }
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+
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+ for (i = 0; i < g->npins; i++) {
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+ struct pinctrl_gpio_range *range;
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+ struct nmk_gpio_chip *nmk_chip;
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+ struct gpio_chip *chip;
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+ unsigned bit;
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+
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+ range = nmk_match_gpio_range(pctldev, g->pins[i]);
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+ if (!range) {
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+ dev_err(npct->dev,
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+ "invalid pin offset %d in group %s at index %d\n",
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+ g->pins[i], g->name, i);
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+ goto out_glitch;
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+ }
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+ if (!range->gc) {
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+ dev_err(npct->dev, "GPIO chip missing in range for pin offset %d in group %s at index %d\n",
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+ g->pins[i], g->name, i);
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+ goto out_glitch;
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+ }
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+ chip = range->gc;
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+ nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
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+ dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", g->pins[i], g->altsetting);
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+
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+ clk_enable(nmk_chip->clk);
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+ bit = g->pins[i] % NMK_GPIO_PER_CHIP;
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+ /*
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+ * If the pin is switching to altfunc, and there was an
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+ * interrupt installed on it which has been lazy disabled,
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+ * actually mask the interrupt to prevent spurious interrupts
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+ * that would occur while the pin is under control of the
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+ * peripheral. Only SKE does this.
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+ */
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+ nmk_gpio_disable_lazy_irq(nmk_chip, bit);
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+
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+ __nmk_gpio_set_mode_safe(nmk_chip, bit, g->altsetting, glitch);
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+ clk_disable(nmk_chip->clk);
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+ }
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+
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+ /* When all pins are successfully reconfigured we get here */
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+ ret = 0;
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+
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+out_glitch:
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+ if (glitch) {
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+ nmk_gpio_glitch_slpm_restore(slpm);
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+ spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
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+ }
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+
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+ return ret;
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+}
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+
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+static void nmk_pmx_disable(struct pinctrl_dev *pctldev,
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+ unsigned function, unsigned group)
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+{
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+ struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
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+ const struct nmk_pingroup *g;
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+
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+ g = &npct->soc->groups[group];
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+
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+ if (g->altsetting < 0)
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+ return;
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+
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+ /* Poke out the mux, set the pin to some default state? */
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+ dev_dbg(npct->dev, "disable group %s, %u pins\n", g->name, g->npins);
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+}
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+
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+int nmk_gpio_request_enable(struct pinctrl_dev *pctldev,
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+ struct pinctrl_gpio_range *range,
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+ unsigned offset)
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+{
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+ struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
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+ struct nmk_gpio_chip *nmk_chip;
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+ struct gpio_chip *chip;
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+ unsigned bit;
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+
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+ if (!range) {
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+ dev_err(npct->dev, "invalid range\n");
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+ return -EINVAL;
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+ }
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+ if (!range->gc) {
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+ dev_err(npct->dev, "missing GPIO chip in range\n");
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+ return -EINVAL;
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+ }
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+ chip = range->gc;
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+ nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
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+
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+ dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset);
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+
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+ clk_enable(nmk_chip->clk);
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+ bit = offset % NMK_GPIO_PER_CHIP;
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+ /* There is no glitch when converting any pin to GPIO */
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+ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
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+ clk_disable(nmk_chip->clk);
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+
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+ return 0;
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+}
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+
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+void nmk_gpio_disable_free(struct pinctrl_dev *pctldev,
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+ struct pinctrl_gpio_range *range,
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+ unsigned offset)
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+{
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+ struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
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+
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+ dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset);
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+ /* Set the pin to some default state, GPIO is usually default */
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+}
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+
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+static struct pinmux_ops nmk_pinmux_ops = {
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+ .get_functions_count = nmk_pmx_get_funcs_cnt,
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+ .get_function_name = nmk_pmx_get_func_name,
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+ .get_function_groups = nmk_pmx_get_func_groups,
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+ .enable = nmk_pmx_enable,
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+ .disable = nmk_pmx_disable,
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+ .gpio_request_enable = nmk_gpio_request_enable,
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+ .gpio_disable_free = nmk_gpio_disable_free,
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+};
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+
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static struct pinctrl_desc nmk_pinctrl_desc = {
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.name = "pinctrl-nomadik",
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.pctlops = &nmk_pinctrl_ops,
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+ .pmxops = &nmk_pinmux_ops,
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.owner = THIS_MODULE,
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};
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Linus Walleij